AMD Zen Microarchitecture: Dual Schedulers, Micro-Op Cache and Memory Hierarchy Revealed
by Ian Cutress on August 18, 2016 9:00 AM ESTLow Power, FinFET and Clock Gating
When AMD launched Carrizo and Bristol Ridge for notebooks, one of the big stories was how AMD had implemented a number of techniques to improve power consumption and subsequently increase efficiency. A number of those lessons have come through with Zen, as well as a few new aspects in play due to the lithography.
First up is the FinFET effect. Regular readers of AnandTech and those that follow the industry will already be bored to death with FinFET, but the design allows for a lower power version of a transistor at a given frequency. Now of course everyone using FinFET can have a different implementation which gives specific power/performance characteristics, but Zen on the 14nm FinFET process at Global Foundries is already a known quantity with AMD’s Polaris GPUs which are built similarly. The combination of FinFET with the fact that AMD confirmed that they will be using the density-optimised version of 14nm FinFET (which will allow for smaller die sizes and more reasonable efficiency points) also contributes to a shift of either higher performance at the same power or the same performance at lower power.
AMD stated in the brief that power consumption and efficiency was constantly drilled into the engineers, and as explained in previous briefings, there ends up being a tradeoff between performance and efficiency about what can be done for a number of elements of the core (e.g. 1% performance might cost 2% efficiency). For Zen, the micro-op cache will save power by not having to go further out to get instruction data, improved prefetch and a couple of other features such as move elimination will also reduce the work, but AMD also states that cores will be aggressively clock gated to improve efficiency.
We saw with AMD’s 7th Gen APUs that power gating was also a target with that design, especially when remaining at the best efficiency point (given specific performance) is usually the best policy. The way the diagram above is laid out would seem to suggest that different parts of the core could independently be clock gated depending on use (e.g. decode vs FP ports), although we were not able to confirm if this is the case. It also relies on having very quick (1-2 cycle) clock gating implementations, and note that clock gating is different to power-gating, which is harder to implement.
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breweyez - Friday, August 19, 2016 - link
You sure sound like an intel fanboysmilingcrow - Friday, August 19, 2016 - link
Recognising and acknowledging that AMD's CPUs were in the doldrums for 10 long years doesn't make you an Intel fanboy but a realist. Ignoring that inconvenient truth does though make you an AMD fanboy.Come on Zen although the amount of crap that the fanboys on both sides will spout when it is released will be immense. I will keep off the forums.
jjj - Friday, August 19, 2016 - link
There are no volumes above 350$, anything above that might as well not exist. Zen more or less needs to compete with Skylake while offering 2x the cores. If they have some higher clocks SKU above 350$, that could work but people need to be able to afford Zen,otherwise what's the point. Zen shouldn't be a huge die so AMD should be able to offer reasonable prices. Ofc there is no need to offer 8 cores high clocks at 200$ ,that's too far.BMNify - Friday, August 19, 2016 - link
if AMD cant get far better throughput than skylake with twice the zen cores , then they have no right to stay in business after all these missteps and the clammer of Jim Keller PR a DEC engineer who helped design the Alpha 21164 and 21264 processors then how can you ever expect to get a UHD1 rec.2020 capable CPU/GPU by even 2020.smilingcrow - Friday, August 19, 2016 - link
A lot of people are hoping that will be their strategy but it depends also on yields and final clock speeds.If they have low yields for the high clock speed parts they might well push that as an FX part and price it at $500 or more. It would still be a good halo product.
Also if they have a really good 8 core at $350 or under it will impact how much they can ask for the higher volume quad core parts.
If they sell too cheap they might have trouble matching the demand.
It's quite a juggling act to balance all that.
azazel1024 - Friday, August 19, 2016 - link
It sounds very good in fact. My biggest thing is overall system cost. Next is performance and finally noise and power consumption. Sure, I've love what a 10 core Core processor can level, but I don't really need it. I can get by with my Ivy Bridge i5-3570, but if I am going to upgrade, I'd like it to be for a nice boost in performance. Compared to my Ivy Bridge, I could be okay with a very small loss in single threaded performance, but I'd like a big gain in multithreaded performance. That to me says that Zen needs to bring, compared to my i5-3570, at least 90% single thread performance and at least 70-80% of the per core performance under multithreaded workloads. Then deliver it with roughly a $400 overall platform cost (between an "entry" mid-grade board and the CPU, ignoring RAM costs). Do that and they have a buyer from me. Don't and I'll probably look at the lowest level Hexacore Skylake-E processor once they come out next year.Basically I need 8 core Zen to be at least a little faster, averaged out, than current 6 core Broadwell-E, yet come in somewhat under the price of 6 core Broadwell-E. That would be enough extra performance to justify an upgrade from my current system early next year.
AndrewJacksonZA - Thursday, August 18, 2016 - link
I am disappointed that they are only releasing Zen in 2017 as I really am looking to upgrade my PC towards the end of the year. But hey, what's another few months, I guess? *siiiiiiiiiiiiiiigh*AndrewJacksonZA - Thursday, August 18, 2016 - link
Aaargh! Where's the edit button please guys????Just to be clear, I'm not waiting /to buy Zen/, I'm waiting for it to come out so that proper, independent tests can show what CPU would be better suited to my pocket and my needs.
melgross - Thursday, August 18, 2016 - link
As always, I've hopes that this will be what AMD says it will, but little confidence that it will.silverblue - Thursday, August 18, 2016 - link
The micro ops cache is a bit of a surprise; I believe the Steamroller preview mentioned that particular design was getting such a cache. Perhaps it didn't in the end.