AMD Zen Microarchitecture: Dual Schedulers, Micro-Op Cache and Memory Hierarchy Revealed
by Ian Cutress on August 18, 2016 9:00 AM ESTLow Power, FinFET and Clock Gating
When AMD launched Carrizo and Bristol Ridge for notebooks, one of the big stories was how AMD had implemented a number of techniques to improve power consumption and subsequently increase efficiency. A number of those lessons have come through with Zen, as well as a few new aspects in play due to the lithography.
First up is the FinFET effect. Regular readers of AnandTech and those that follow the industry will already be bored to death with FinFET, but the design allows for a lower power version of a transistor at a given frequency. Now of course everyone using FinFET can have a different implementation which gives specific power/performance characteristics, but Zen on the 14nm FinFET process at Global Foundries is already a known quantity with AMD’s Polaris GPUs which are built similarly. The combination of FinFET with the fact that AMD confirmed that they will be using the density-optimised version of 14nm FinFET (which will allow for smaller die sizes and more reasonable efficiency points) also contributes to a shift of either higher performance at the same power or the same performance at lower power.
AMD stated in the brief that power consumption and efficiency was constantly drilled into the engineers, and as explained in previous briefings, there ends up being a tradeoff between performance and efficiency about what can be done for a number of elements of the core (e.g. 1% performance might cost 2% efficiency). For Zen, the micro-op cache will save power by not having to go further out to get instruction data, improved prefetch and a couple of other features such as move elimination will also reduce the work, but AMD also states that cores will be aggressively clock gated to improve efficiency.
We saw with AMD’s 7th Gen APUs that power gating was also a target with that design, especially when remaining at the best efficiency point (given specific performance) is usually the best policy. The way the diagram above is laid out would seem to suggest that different parts of the core could independently be clock gated depending on use (e.g. decode vs FP ports), although we were not able to confirm if this is the case. It also relies on having very quick (1-2 cycle) clock gating implementations, and note that clock gating is different to power-gating, which is harder to implement.
Facebook
Twitter
RSS
216 Comments
View All Comments
wumpus - Thursday, August 18, 2016 - link
I want this chip (or a semi-low priced i7 with the graphics removed and 4 more cores in its place) with HBM[2-3] memory (and presumably all the DRAM that fits. Hopefully in 5 years that doesn't imply a transition die) and xpoint as "main memory - SSD buffer/cache/'SSD dram'"So yes, five years at least.
ikjadoon - Thursday, August 18, 2016 - link
No, I think it theoretically is very relevant. If those QD1 numbers are to be believed, we should see noticeable performance increases in day-to-day usage, right?Exactly: it's a fantasy at the price points that are palatable to *consumers*, hehe. Prosumers are also buying $1000+ GPUs, hehe...not the same market.
Right....and that transition is still many years away.
So, what I meant....IDF16 is not very interesting for consumers. AMD timed this presentation quite well.
smilingcrow - Thursday, August 18, 2016 - link
I am not sure that the QD1 numbers will really make a noticeable difference for general consumer usage patterns. Have to wait for real world benchmarks.azazel1024 - Thursday, August 18, 2016 - link
I was very meh about Zen, but now I am actually kind of anticipating it. Even with some of the early engineering sample leaks and rumors that it will be improved IPC, possibly even right up on Skylake, but with much lower clocks. meaning it'll still be lower single threaded performance doesn't bother me too much. BD and it's kin are generally extremely poor single thread compared to Intel's latest Core processors. If Zen comes a fair amount closer...but does it while having 8 cores and 16 threads...that to me says it might actually have a good shot at being in between Skylake/Broadwell and Broadwell-E. If it can do that at a lower price point and being in spitting distance of single thread performance AND manage vaguely reasonable power consumption figures, you could count me as a buyer (if AM4 socketed boards have decent bus support).Give me a Zen with 80-90% of the single thread of Broadwell-E and 80-90% of the mutlthreaded performance of an Octocore Broadwell-E at the price of an entry level Broadwell-E Hexacore, or even a little less ($250-350) and you could count me as a buyer, so long as it isn't some 150TDP monster.
jjj - Thursday, August 18, 2016 - link
Intel rates Broadwell-E at 140W while Zen 8 cores is supposed to be 95W.We'll see about base clocks and Turbo clocks but power might end up being very interesting.
Ofc die size will be interesting too and they should have 4 cores 65W with no GPU.
smilingcrow - Friday, August 19, 2016 - link
Keep in mind that the TDP for the E range tends to be the same for the whole range so in practice the chips below the top of the stack may in reality be capable of using a lower TDP.patel21 - Thursday, August 18, 2016 - link
For me, a performance comparable to i3 skylake, with power requirements at max over 20% of i3, with a good gpu integrated and at around 70% of i3's price. And My boat will sail AMD....Ho yaanandnandnand - Thursday, August 18, 2016 - link
Weren't "8-core" Bulldozer/Excavator chips sold around $200-250? Maybe it's not so crazy to say that AMD will sell Zen real 8-cores in that price range.80% single threaded of Broadwell-E, 80% multithreaded performance, $225. How does that sound?
Gigaplex - Thursday, August 18, 2016 - link
If Zen is much faster than Bulldozer, expect it to cost quite a bit more. Bulldozer sold for peanuts because nobody wanted it.StrangerGuy - Thursday, August 18, 2016 - link
Didn't you already know AMD fanboys have the right to be self-entitled cheapskates?"I want AMD to be competitive but without the competitive price tag along with it because evil Intel/NV."