Investigating Cavium's ThunderX: The First ARM Server SoC With Ambition
by Johan De Gelas on June 15, 2016 8:00 AM EST- Posted in
- SoCs
- IT Computing
- Enterprise
- Enterprise CPUs
- Microserver
- Cavium
Compression & Decompression
While compression and decompression are not real world benchmarks in and of themselves (at least as far as servers go), more and more servers have to perform these tasks as part of a larger role (e.g. database compression, website optimization).
Although the ThunderX suffers from very high memory latency and a relatively modest TLB architecture, the Broadwell CPUs have one-quarter the cores. Secondly, once 20+ threads hit the memory, memory bandwidth becomes just as important as latency.
The ThunderX blows the Intel competition of the charts in decompression. However, this is an extremely ideal scenario for the ThunderX cores. First of all, the high amount of unpredictable branches of course favor the 9 stage pipeline. Secondly, ARM supports conditional instructions which might eliminate some of the branches. Thirdly, this is a very low IPC software. Remember that the complex Broadwell core had little IPC advantage over the ThunderX. So many small cores pays off big time... but this is not a full blown server benchmark.
82 Comments
View All Comments
BlueBlazer - Friday, June 17, 2016 - link
Cavium is quite aware of their ThunderX single thread weakness, and directly from Cavium themselves https://www.youtube.com/watch?v=ei9uVskwPNE thanks to ARMdevices.net.TiffanyTown - Thursday, July 28, 2016 - link
hi, The JDK version you used is OpenJDK 1.8.0_91 . Did you build it yourself?