OpenCAPI

Microchip's subsidiary Microsemi is entering a new market with the introduction of the SMC 1000 8x25G Serial Memory Controller. This is a DDR4 DRAM controller that connects to host processors using the OpenCAPI-derived Open Memory Interface (OMI), a high-speed differential serial link running at 25Gbps per lane. The purpose is to enable servers to scale to much higher memory capacities by attaching DRAM through serial links with much lower pin counts than traditional parallel DDR interfaces. OpenCAPI is one of several competing high-speed interconnect standards that seek to go beyond the performance and feature set of PCI Express. The first two CAPI standards were built atop PCIe 3.0 and 4.0 and offered a lower-latency, cache-coherent protocol. Version 3 gained the Open- prefix by moving control...

Xilinx Announces Project Everest: The 7nm FPGA SoC Hybrid

This week Xilinx is making public its latest internal project for the next era of specialized computing. The new product line, called Project Everest in the interim, is based...

16 by Ian Cutress on 3/19/2018

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