CPU Architecture Improvements: Background

Despite all of this platform discussion, we must not forget that Haswell is the fourth tock since Intel instituted its tick-tock cadence. If you're not familiar with the terminology by now a tock is a "new" microprocessor architecture on an existing manufacturing process. In this case we're talking about Intel's 22nm 3D transistors, that first debuted with Ivy Bridge. Although Haswell is clearly SoC focused, the designs we're talking about today all use Intel's 22nm CPU process - not the 22nm SoC process that has yet to debut for Atom. It's important to not give Intel too much credit on the manufacturing front. While it has a full node advantage over the competition in the PC space, it's currently only shipping a 32nm low power SoC process. Intel may still have a more power efficient process at 32nm than its other competitors in the SoC space, but the full node advantage simply doesn't exist there yet.

Although Haswell is labeled as a new micro-architecture, it borrows heavily from those that came before it. Without going into the full details on how CPUs work I feel like we need a bit of a recap to really appreciate the changes Intel made to Haswell.

At a high level the goal of a CPU is to grab instructions from memory and execute those instructions. All of the tricks and improvements we see from one generation to the next just help to accomplish that goal faster.

The assembly line analogy for a pipelined microprocessor is over used but that's because it is quite accurate. Rather than seeing one instruction worked on at a time, modern processors feature an assembly line of steps that breaks up the grab/execute process to allow for higher throughput.

The basic pipeline is as follows: fetch, decode, execute, commit to memory. You first fetch the next instruction from memory (there's a counter and pointer that tells the CPU where to find the next instruction). You then decode that instruction into an internally understood format (this is key to enabling backwards compatibility). Next you execute the instruction (this stage, like most here, is split up into fetching data needed by the instruction among other things). Finally you commit the results of that instruction to memory and start the process over again.

Modern CPU pipelines feature many more stages than what I've outlined here. Conroe featured a 14 stage integer pipeline, Nehalem increased that to 16 stages, while Sandy Bridge saw a shift to a 14 - 19 stage pipeline (depending on hit/miss in the decoded uop cache).

The front end is responsible for fetching and decoding instructions, while the back end deals with executing them. The division between the two halves of the CPU pipeline also separates the part of the pipeline that must execute in order from the part that can execute out of order. Instructions have to be fetched and completed in program order (can't click Print until you click File first), but they can be executed in any order possible so long as the result is correct.

Why would you want to execute instructions out of order? It turns out that many instructions are either dependent on one another (e.g. C=A+B followed by E=C+D) or they need data that's not immediately available and has to be fetched from main memory (a process that can take hundreds of cycles, or an eternity in the eyes of the processor). Being able to reorder instructions before they're executed allows the processor to keep doing work rather than just sitting around waiting.

Sidebar on Performance Modeling

Microprocessor design is one giant balancing act. You model application performance and build the best architecture you can in a given die area for those applications. Tradeoffs are inevitably made as designers are bound by power, area and schedule constraints. You do the best you can this generation and try to get the low hanging fruit next time.

Performance modeling includes current applications of value, future algorithms that you expect to matter when the chip ships as well as insight from key software developers (if Apple and Microsoft tell you that they'll be doing a lot of realistic fur rendering in 4 years, you better make sure your chip is good at what they plan on doing). Obviously you can't predict everything that will happen, so you continue to model and test as new applications and workloads emerge. You feed that data back into the design loop and it continues to influence architectures down the road.

During all of this modeling, even once a design is done, you begin to notice bottlenecks in your design in various workloads. Perhaps you notice that your L1 cache is too small for some newer workloads, or that for a bunch of popular games you're seeing a memory access pattern that your prefetchers don't do a good job of predicting. More fundamentally, maybe you notice that you're decode bound more often than you'd like - or alternatively that you need more integer ALUs or FP hardware. You take this data and feed it back to the team(s) working on future architectures.

The folks working on future architectures then prioritize the wish list and work on including what they can.

Other Power Savings & The Fourth Haswell The Haswell Front End
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  • A5 - Friday, October 5, 2012 - link

    8 years is a loooooong time in this space, and yes you (and most people here) are in the minority.

    Notebooks have been outselling desktops for several years, and in 2011 smartphone shipments were higher than all PC form-factors combined. It's pretty clear where the big bucks are going, and it isn't desktop PCs.
  • flamethrower - Friday, October 5, 2012 - link

    In 8 years you'll have 50-inch OLED TVs on your walls. What's going to drive them? Possibly a computer integrated into them.
  • Peanutsrevenge - Friday, October 5, 2012 - link

    We'll just be using large screens, keyboards and mice wireless connected to our ultra portable devices.

    The desktop will likely still exist for people like us who frequent this site, however it's role will be far more specialised, possibly more as our personal cloud servers than our PCs.
  • yankeeDDL - Friday, October 5, 2012 - link

    Wow. Thanks for the excellent article: I really enjoyed it.
    The thought of having a processor of the power level of Ivy bridge in my mobile phone blows my mind.
    Honestly though, I really can't see how the volume of CPUs for desktop PCs and servers is going to drop so dramatically, that Intel will need the volume generated by mobile, to "survive".
    Yes, of course more volume will help, but 8 years from now, even if the mobiles will have such kind of computational power, I would imagine that a Desktop would have 10~20x that performance, as it is today.
    It's true that today's CPUs are typically more powerful than the average user ever needs, but raise the hand who wouldn't trade his CPU for one 10x faster (in the same power envelope) ...
    That said, 10W still seems like a lot to fit in a mobile: who knows the power consumption of high-end mobile CPUs today? (quad-core Krait CPU, for example, or even Tegra3)
  • dagamer34 - Friday, October 5, 2012 - link

    Intel's real problem is that the power needed for "good enough" computing in a typical desktop CPU came a couple of years ago Nd is rapidly approaching in mobile. With more and more tasks being offloaded to the cloud, battery life is becoming a stronger and stronger focus.

    What's sad is that because AMD isn't the major player it once was, Intel has allowed it's eye off the ball, revving Atom with only minor tweaks and having a laissez faire approach to GPU performance. It's only been recently when mobile has started to dominate in the minds of consumers and Intel's lack of any major design wins (the RAZR I doesn't count) which has forced Intel to push as hard as it is now.
  • sp3x0ps - Friday, October 5, 2012 - link

    Where is the iPhone 5 review? I need details!! arghh.
  • Demon-Xanth - Friday, October 5, 2012 - link

    Atom was targeted to UMPCs, but quickly took over low power embedded systems who don't need much power but do run Windows.
  • tipoo - Friday, October 5, 2012 - link

    Poor Via.
  • dgingeri - Friday, October 5, 2012 - link

    "Within 8 years many expect all mainstream computing to move to smartphones, or whatever other ultra portable form factor computing device we're carrying around at that point."

    They said the same thing about laptops. Sure, laptops hold about 60-65% of the market these days, but the desktop is still very much around, and is the preferred platform for PC gamers and HTPC applications. They're far more flexible than any mobile form factor.

    Smartphones also have the severe disadvantage of a very small screen. Even the largest are too small for most people to deal with. On top of that, actually surfing the net on those tiny screens is an exercise in frustration for many people. I try to tap on a link, only to get the link next to it, or above it, or below it, or possibly having my stupid phone just select the text instead of following the link.

    Smartphones have their niche. There's no doubt there, but they are not going to be anyone's mainstream device unless they have needle thin fingers and 20/10 vision.
  • Anand Lal Shimpi - Friday, October 5, 2012 - link

    I agree with the notebook/desktop comparison - these form factors won't go away. I should have said the majority of mainstream client computing goes to smartphones. And solving the display and input problems is easy: wireless display (WiDi/Miracast) and wireless keyboard/mouse (or a dock that does both over wires if you'd rather that).

    Take care,
    Anand

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