DDR3 vs. DDR2

by Wesley Fink on May 15, 2007 2:40 PM EST
Latency

As discussed earlier, one of the long term potentials of DDR3 is improved memory latency. To better evaluate whether this is evident with early DDR3 we used the latest version of Lavalys Everest, which is now 4.0. The Memory Latency benchmark was run on both DDR2 and DDR3 test beds at each relevant speed.

Everest 4.0 - 2.66GHz
Memory Latency in ns - Lower is Better
Memory Speed P965
ASUS P5B Dlx
P35 DDR2
ASUS P5K Dlx
P35 DDR3
ASUS P5K3 Dlx
DDR2-800 3-3-3-9 64.7 63.3 -
DDR2-800 5/6-6-6-15
DDR3-800 6-6-6-15
71.2 72.7 72.7
DDR2-1067 4-4-3-11 58.5 59 -
DDR2-1067 5/6-6-6-15 60.5 62.2 -
DDR3-1067 7-7-7-20 - - 63.9
DDR3-1333 9-9-9-25 - - 63

Latency test results did not really show us any improvement in the P35 chipset or DDR3. At this early stage of DDR3 the promised latency improvements are not evident. As DDR3 memory speeds increase in the future, and DDR3 memory timings improve, improved latency should be more evident.

We conclude that memory latency is currently all but identical at the same memory speed and timings, whether using DDR2 on P965, DDR2 on P35, or DDR3 on P35. DDR2 cannot yet reach the 1333 speed, while this is an easy target for DDR3. Perhaps higher speed DDR3 and lower timings will allow DDR3 to break away in latency comparisons.

Bandwidth and Memory Scaling Number Crunching and Gaming
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  • Wesley Fink - Tuesday, May 15, 2007 - link

    Yes. The P965 would not boot witha a CAS setting of 6 even though it could be selected. So the P965 was tested at 5-6-6 timings. The same DDR2 on the P5K was tested at 6-6-6, which would work and also matched the DDR3 timings. We will clarify this in the article.
  • TA152H - Tuesday, May 15, 2007 - link

    OK, thanks.

    One thing I would suggest when you do the final tests for the Bearlake and DDR3 is to use the 2M processors as well. You'd expect the 4M cache to hide the differences better, obviously, so the 2M cache processors would be pretty interesting to see as well, if for no other reason to see how much the larger cache does mask the difference in the chipset and memory. Since Intel is planning on increasing cache sizes, it would be a pretty useful data point.
  • TA152H - Tuesday, May 15, 2007 - link

    You measured the performance of the memory, but why not take a power measurement of it as well. That is one of the draws of the technology, it uses lower voltage, and therefore should use a little less power and generate less heat. Both are significant.

    Good article though, I just wish that had been included.
  • kalrith - Tuesday, May 15, 2007 - link

    Page 2, second line of second-to-last paragraph says, "which is a 16% reduction form DDR2". "form" should be "from".

    Last page, fourth line of third-to-last paragraph says, "the shift to DDR2 may be further delayed". "DDR2" should be "DDR3".

    BTW, I found the article interesting, informative, enlightening, and unbiased (as usual).
  • Wesley Fink - Tuesday, May 15, 2007 - link

    Mild dyslexia and less-than smart built-in spell checkers always win :) Both errors are corrected. Thanks.

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