Understanding Pentium M Architecture

There is no doubt that the Pentium M performs very well as a low power, high performance mobile processor. We published two articles comparing the performance of the Pentium M Athlon 64 and Pentium 4, and in both cases the Pentium M did exceptionally well.

The problem is that until recently, the only mobile platforms were all single channel DDR solutions, making it difficult to extrapolate how the Pentium M would fare against its competition in the desktop world. The desktop Pentium 4 and Athlon 64s aren't equipped with a single channel memory controller and they come in larger cache, higher performance models than in the thin and light systems on the mobile side that you find them.

Before we get to the actual performance comparison, there's a lot that needs to be understood about the Pentium M architecture.

While the underlying architecture of the Pentium M is far more complex than this, the real world application performance of the CPU can be summarized and understood when looking at four points:
  1. High IPC Core
  2. Low Latency L2 Cache
  3. Memory Latency and Bandwidth, and
  4. FPU Performance
The high IPC core has already been explained in previous articles on the Pentium M, as well as briefly recapped in this article. With a shorter pipeline than the Pentium 4, but one longer than the Pentium III, the Pentium M can do more per clock than its more popular desktop cousin - which is why it is able to remain competitive despite its lower clock speeds (much like the Athlon 64).

Through the use of technologies like micro-ops fusion and its sophisticated branch prediction unit, the Pentium M ends up being even more efficient per clock than a Pentium III - despite having a longer pipeline. Based on its SPEC CPU2000 scores, the Pentium M features a 20% higher IPC than the Pentium III at an identical clock speed, despite its longer pipeline. The Pentium M vs. Pentium III comparison is similar to the Prescott vs. Northwood comparison, where the deeper pipelined Prescott was still able to make up for the loss in IPC through increases in efficiency and new branch prediction algorithms.

Problem #2: Total Cost of Ownership Low Latency L2 Cache
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  • Jeff7181 - Monday, February 7, 2005 - link

    Give the Dothan a speed bump and some dual channel DDR400 and stay out of it's way...
  • MDme - Monday, February 7, 2005 - link

    well, now we FINALLY have a comprehensive review of the P-M, it's strengths and weaknesses. While the P-M is good. the A64 is still better.
  • Netopia - Monday, February 7, 2005 - link

    Yeah, I was about to say the same as #3.

    Why did you go to the trouble to list what the AthlonXP system would have in it and then not actually test or reference it anywhere in the article?

    I still have a bunch of AXP machines and regularly help others upgrade using XP-M's, so it would be interesting to see these at least included in reviews for a while.
  • CrystalBay - Monday, February 7, 2005 - link

    Hi, I noticed in the testbed an AXP3200/NF2U400 but there are no charts with this setup.
  • Beenthere - Monday, February 7, 2005 - link

    It's a pipe dream for those who wish Intel had their act together. It's already confirmed M don't scale well and is not effective for HD computing. It's performance is really some place between Sempron and A64 but certainly not a suitable competitor to A64 nor FX. Just another Hail Mary for a defunct Intel.
  • coldpower27 - Monday, February 7, 2005 - link

    Hmm, an interesting review on the Pentium M to say the least. Though are 2-2-2-10 timings for the Pentium M the best for this architecture???
  • 0ldman79 - Wednesday, January 26, 2022 - link

    It's interesting coming back and reading this after it's all settled, Core 2 seemed to be an evolution of the Pentium M line.

    Intel did hang the Netburst architecture up, though they added a lot of Netburst's integer design to Core 2 while designing Nehalem. AMD apparently believed that Intel was going to stick with Netburst and designed the FX line, while Intel went back to their earlier designs and lowered the clock speed, massively increased the IPC and parallelism and out-Phenom'ed the Phenom with Nehalem.

    Back then Intel believed that Dennard scaling would continue and they'd have 10GHz chips, turns out wider and slower is better.

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