Deep Learning

This week, Google announced Cloud TPU beta availability on the Google Cloud Platform (GCP), accessible through their Compute Engine infrastructure-as-a-service. Using the second generation of Google’s tensor processing units (TPUs), the standard Cloud TPU configuration remains four custom ASICs and 64 GB of HBM2 on a single board, intended for accelerating TensorFlow-based machine learning workloads. With a leased Google Compute Engine VM, Cloud TPU resources can be used alongside current Google Cloud Platform CPU and GPU offerings. First revealed at Google I/O 2016, the original TPU was a PCIe-based accelerator designed for inference workloads, and for the most part, the TPUv1 was used internally. This past summer, Google announced the inference and training oriented successor, the TPUv2, outlining plans to incorporate it into their cloud...

The NVIDIA Titan V Preview - Titanomachy: War of the Titans

Today we're taking a preview look at NVIDIA's new compute accelerator and video card, the $3000 NVIDIA Titan V. In Greek mythology Titanomachy was the war of the Titans...

112 by Ryan Smith & Nate Oh on 12/20/2017

Khronos Group Launches the Neural Network Exchange Format

Today the Khronos Group, the industry consortium behind OpenGL and Vulkan, released a v1.0 provisional specification for its Neural Network Exchange Format (NNEF). First announced last year, this provisional...

8 by Nate Oh on 12/20/2017

NVIDIA Announces “NVIDIA Titan V" Video Card: GV100 for $3000, On Sale Now

Out of nowhere, NVIDIA has revealed the NVIDIA Titan V today at the 2017 Neural Information Processing Systems conference, with CEO Jen-Hsun Huang flashing out the card on stage...

159 by Ryan Smith & Nate Oh on 12/7/2017

Intel Shipping Nervana Neural Network Processor First Silicon Before Year End

This week at the Wall Street Journal’s D.Live 2017, Intel unveiled their Nervana Neural Network Processor (NNP), formerly known as Lake Crest, and announced plans to ship first silicon...

25 by Nate Oh on 10/18/2017

NVIDIA Gives Xavier Status Update & Announces TensorRT 3 at GTC China 2017 Keynote

Earlier today at a keynote presentation for their GPU Technology Conference (GTC) China 2017, NVIDIA’s CEO Jen-Hsun Huang disclosed a few updated details of the upcoming Xavier ARM SoC...

11 by Nate Oh on 9/26/2017

Imagination Joins the AI Party, Announces PowerVR Series 2NX Neural Network Accelerator

In conjunction with today’s PowerVR Series 9XE and Series 9XM announcement, Imagination is revealing a new series of PowerVR-branded hardware IP blocks: the Series 2NX neural network accelerator (NNA)...

19 by Nate Oh on 9/21/2017

NVIDIA Ships First Volta-based DGX Systems

This Wednesday, NVIDIA has announced that they have shipped their first commercial Volta-based DGX-1 system to the MGH & BWH Center for Clinical Data Science (CCDS), a Massachusetts-based research...

48 by Nate Oh on 9/7/2017

Hot Chips: Intel Knights Mill Live Blog (4:45pm PT, 11:45pm UTC)

Another talk from Hot Chips, this time on Intel's Knights Mill (KNM). The Intel Knights family stems from their Xeon Phi product line, although KNM is a bit different...

22 by Ian Cutress on 8/21/2017

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