The Intel Xeon E7-8800 v3 Review: The POWER8 Killer?
by Johan De Gelas on May 8, 2015 8:00 AM EST- Posted in
- CPUs
- IT Computing
- Intel
- Xeon
- Haswell
- Enterprise
- server
- Enterprise CPUs
- POWER
- POWER8
The Competitor: IBM's POWER8
As we briefly mentioned in the introduction, among all of the potential competitors for the Xeon E7 line, IBM's OpenPower might be the most potent competitor at this time. So how do IBM's offerings compare to Intel's? IBM POWER 8 is a Brainiac (high IPC) design that also wants to be speed demon (high clock speeds).
The POWER8 core can decode, issue and execute and retire 8 instructions per cycle. That degree of of instruction level parallelism (ILP) can not be extracted out of (most) software. To battle the lack of ILP in software, no less than 8 threads (SMT) are active per core. According to IBM,
- 2-threads delivers about 45% performance more than one
- 4-threads deliver yet another 30% boost
- the last 4-threads deliver about 7%
So in total, the 8-way SMT doubles the performance of this massive core. Let us compare the two chips.
| Xeon E7v3/POWER8 Comparison | ||
| Feature | Intel Haswell-EX Xeon E7 |
IBM POWER8 |
| Process tech. | 22nm FinFET | 22nm SOI |
| Max clock | 2.5-3.6 GHz | 3.5-4.35 GHz |
| Max. core count Max. thread count |
18@2.5 GHz 36 SMT |
12@4.2 GHz 96 SMT |
| Max. sustained IPC | 6 (4) | 8 |
| L1-I / L1-D Cache | 32 KB/32 KB | 32 KB/64 KB |
| L2 Cache | 256 KB SRAM per core | 512 KB SRAM per core |
| L3 Cache | 2.5 MB SRAM per core | 8 MB eDRAM per core |
| L4 Cache | None | 16 MB eDRAM per MBC (64/128 MB total) |
| Memory | 1.5 TB per socket (64 GB per DIMM) |
1-2 TB per socket (64 GB per DIMM) |
| Theoretical Memory Bandwidth | 102 GB/s (independent mode) |
204 GB/s |
| PCIe 3.0 Lanes | 40 Lanes | 32 Lanes |
The POWER8 looks better than Haswell-EX in almost every spec, but the devil is of course in the details. First of all, Intel's L2-cache works at the same clock as the core, IBM's L2-cache runs at a lower clock (2.2 GHz or less, depending on the model). Secondly, the POWER8's L3 eDRAM cache might be much larger, but it is so also a bit slower.
But the main disadvantage of the POWER8 is that all this superscalar wideness and high clockspeed goodness comes with a power price. This slide from Tyan at the latest OpenPOWER conference tell us more.
A 12 core POWER8 is "limited" to 3.1 GHz if you want to stay below the 190W TDP mark. Clockspeeds higher than 4 GHz are only possible with 8-cores and a 250W TDP. This makes us really curious what kind of power dissipation we may expect from the 4.2 GHz 10-core POWER8 inside the expensive E870 Enterprise systems (300W?).
That is not all. Each "Jordan Creek2" memory buffer on the Intel system is limited to about 9W. IBM uses a similar but more complex "Centaur" memory buffer (including a 16 MB cache) which needs more than twice as much energy (16-20W). There are at least four of them per chip, and a high-end chip can have eight. So in total the Intel CPU plus memory buffers have a 201W TDP (165W CPU + 4x9W Jordan Creek 2), while the IBM platform has at best a 270W TDP (190W CPU+ 4x20W MBC).
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PowerTrumps - Saturday, May 9, 2015 - link
Oracle has been unable to develop a power core let alone a processor. What they have done is created servers with many cores and many threads albeit weak cores/threads. The S3 core was an improvement and no reason to think the S4 won't be decent either. However, the M7 will come (again, true to form) with 32 cores per socket. It will be like 8 mini clusters of 4 cores because they are unable to develop a single SMP chip with shared resources across all of the cores. As such, these mini clusters will have their own resources which will lead to latency and inefficiencies. Oracle is a software business and their goal is to run software on either the most cores possible or the most inefficient. They have both of these bases covered with their Intel and SPARC business.Also, performance per Watt is important for Intel because what you see is what you get. With Power though, when you have strong single thread performance, strong multi-thread performance and tremendous consolidation efficiency due to Power Hypervisor efficiency means ~200W doesn't matter when you can consolidate 2, 4 maybe 10 Intel chips at 135W each into a single Power chip because of this hypervisor efficiency.
tynopik - Friday, May 8, 2015 - link
pg4 - datam iningder - Friday, May 8, 2015 - link
Woo...we're bout to have another GHz War here!usernametaken76 - Friday, May 8, 2015 - link
I'm sure you mean figuratively. We've been stuck between 4-5 GHz on POWER architecture for closing in on a decade.zamroni - Friday, May 8, 2015 - link
My conclusion is Samsung should buy AMD to reduce Intel dominance.alpha754293 - Friday, May 8, 2015 - link
It would have been interesting to see the LS-DYNA benchmark results again (so that you can compare it against some of the tests that you've ran previously). But very interesting...JohanAnandtech - Friday, May 8, 2015 - link
Give me some help and we'll do that again on an update version :-)alpha754293 - Tuesday, May 12, 2015 - link
Not a problem. You have my email address right? And if not, I'll just send you another email and we can get that going again. :) Thanks.andychow - Friday, May 8, 2015 - link
If Samsung bought AMD, they would lose the licence for both x86 and x86_64 production. It would in fact ensure Intel's dominance of the market.Kevin G - Friday, May 8, 2015 - link
The x86 license can be transferred as long as Intel signs off on the deal (and it is in their best interest to do so). What will probably happen is that if any company buys AMD, the new owner will enter a cross licensing agreement with Intel.