Investigating Cavium's ThunderX: The First ARM Server SoC With Ambition
by Johan De Gelas on June 15, 2016 8:00 AM EST- Posted in
- SoCs
- IT Computing
- Enterprise
- Enterprise CPUs
- Microserver
- Cavium
Multi-Threaded Integer Performance: SPEC CPU2006
The value of SPEC CPU2006 int rate is questionable as it puts too much emphasis on bandwidth and way too little emphasis on data synchronization. However, it does give some indication of the total "raw" integer compute power available.
| Subtest SPECCPU2006 integer |
Application type | Cavium ThunderX 2 GHz |
Xeon D-1587 1.8-2.4 |
Xeon E5-2640 v4 2.4-2.6 |
| 400.perlbench | Spam filter | 372 | 394 | 322 |
| 401.bzip2 | Compression | 166 | 225 | 216 |
| 403.gcc | Compiling | 257 | 218 | 265 |
| 429.mcf | Vehicle scheduling | 110 | 130 | 224 |
| 445.gobmk | Game AI | 411 | 337 | 269 |
| 456.hmmer | Protein seq. analyses | 198 | 299 | 281 |
| 458.sjeng | Chess | 412 | 362 | 283 |
| 462.libquantum | Quantum sim | 139 | 126 | 231 |
| 464.h264ref | Video encoding | 528 | 487 | 421 |
| 471.omnetpp | Network sim | 121 | 127 | 172 |
| 473.astar | Pathfinding | 143 | 165 | 195 |
| 483.xalancbmk | XML processing | 227 | 219 | 266 |
On average, the ThunderX delivers the throughput of an Xeon D1581 or Xeon E5-2640. There are some noticeable differences between the subtest though, especially if you check the scalability.
| Subtest SPECCPU2006 integer |
Application type | Cavium ThunderX 2 GHz (48 copies) |
Xeon D-1587 1.8-2.3 (32 copies) |
Xeon E5-2640 v4 2.4-2.6 (20 copies) |
| 400.perlbench | Spam filter | 43x | 14x | 10x |
| 401.bzip2 | Compression | 25x | 13x | 11x |
| 403.gcc | Compiling | 22x | 8x | 9x |
| 429.mcf | Vehicle scheduling | 15x | 3x | 6x |
| 445.gobmk | Game AI | 41x | 17x | 12x |
| 456.hmmer | Protein seq. analyses | 42x | 14x | 11x |
| 458.sjeng | Chess | 47x | 16x | 11x |
| 462.libquantum | Quantum sim | 8x | 2x | 4x |
| 464.h264ref | Video encoding | 42x | 13x | 10x |
| 471.omnetpp | Network sim | 17x | 6x | 7x |
| 473.astar | Pathfinding | 16x | 10x | 10x |
| 483.xalancbmk | XML processing | 27x | 7x | 7x |
Mcf is memory latency bound, but if you run 32 threads on the Xeon D, you completely swamp its memory subsystem. The ThunderX and Xeon E5 scale better simply because they can deliver better bandwidth... but one has to wonder if this has anything to do with what people who actually use mcf will experience, as mcf is mostly latency bound. It seems like a corner case.
The XML processing testis probably a lot closer to the real world: it is much easier to split XML (or JSON) processing into many parallel parts (one per request). This is something that fits the ThunderX very well, it edges out the best Xeon D. The same is true for the video encoding tests. This indicates that the ThunderX is most likely a capable Content Delivery Network (CDN) server.
Gcc and sjeng scale well and as a result, the Thunder-X really shines in these subtests.
Facebook
Twitter
RSS
82 Comments
View All Comments
JohanAnandtech - Wednesday, June 15, 2016 - link
Good suggestion. I have been using an ipmi client to manage several other servers, like the IBM servers. However, such a GUI client is still a bit more userfriendly, ipmi commands can get complicated if you don't use them regularly. The thing is that HP and Intel's BMC GUI are a lot easier to use and more reliable.fanofanand - Wednesday, June 15, 2016 - link
I think you may have an inaccurate figure of 141 at idle (in the graph) for the Thunder. "makes us suspect that the chip is consuming between 40 and 50W at idle, as measured at the wall"JohanAnandtech - Wednesday, June 15, 2016 - link
If you look at the Column "peak vs idle", you see 82W. At peak, we assume that a 120W TDP chip will probably need about 130W. 130W - 82W (both measured at the wall) = 50W for the SoC alone at idle measured at the wall, so anywhere between 40-50W in reality. My Calculation is a "guestimate", but it is clear that the Cavium chip needs much more in idle than the Intel chips.(10-15W) .djayjp - Wednesday, June 15, 2016 - link
Many spelling/grammar issues here. It impacts readability. Please read before posting.djayjp - Wednesday, June 15, 2016 - link
That is to say in the article.mariush - Wednesday, June 15, 2016 - link
These guys are already working on ThunderX2 (54 cores, 3 Ghz , 14nm , ARMv8) and they already have functional chips : https://www.youtube.com/watch?v=ei9uVskwPNEMeteor2 - Thursday, June 16, 2016 - link
It's always jam tomorrow, isn't it? Intel is working on new chips too, you know.beginner99 - Wednesday, June 15, 2016 - link
It loses very clearly in performance/watt to Xeon-D. In this segment the lower price doesn't matter in that case and the fact that it has a process disadvantage doesn't matter either. What counts is the end result. And I doubt it would cost $800 if made on 14/16nm. I mean why would anyone buying this take the risk? Safer bet to go with Intel also due to more flexible use (single and multi threaded). The latency issue is mentioned but downplayed.blaktron - Wednesday, June 15, 2016 - link
So downplayed. Anandtech desperately wants ARM servers, but its a solution looking for a problem. Big web front ends running on bare metal are such a small percentage of the server market that developing for it seems stupid. Xeon-D was already in development for SANs, they just repurposed it for docker and nginx.Senti - Wednesday, June 15, 2016 - link
Very nice article. I especially liked the emphasis on relations of test numbers and real world workloads and what was problematic during the testing.It would be great to see the same style desktop CPU review (Zen?) form you instead of mix of reprinted marketing hype with silly benchmark numbers dump that plagues this site for quite some time now.
Some annoying typos here and there, like "It is clear that the ThunderX is a match for high frequency trading", but nothing really bad.