Final Words

With the exception of the announcement that Intel would be picking up 64 bit extensions for their x86 line of processors, this springs forum has been fairly subdued. Much of the interest at the forum focused PCI Express as an emerging technology, and there were plenty of booths with PCI Express based technology being shown off. While our 128 core processors are quite a ways down the road, the next generation of graphics technology is rapidly approaching, and it will be very interesting to see what impact the new bus technology has on performance.

While there wasn't as much excitement as the P4EE announcement of the fall, everyone who was at IDF this spring witnessed the first of an incredible number of changes that are coming to a platform near you. With new sockets, busses, platforms, memories, and everything else coming our way, it is sure to be an exciting year.

We hope you've enjoyed our coverage of this year's Intel Developer Forum. We will be back in San Francisco in the Fall to bring you more coverage from a time when all the questions we've asked here will have been answered, yet our dreams of multicore CPUs will continue.

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  • TrogdorJW - Tuesday, February 24, 2004 - link

    Ugh... IPS was supposed to be IPC.

    IPS has been proposed as an alternative to MHz as a processor speed measurement (Instructions Per Second = IPC * MHz), but figuring out the *average* number of instructions per clock is likely to bring up a whole new set of problems.
  • TrogdorJW - Tuesday, February 24, 2004 - link

    The AMD people will probably love this quote:

    "We still need to answer the question of how we are going to get from here to there. As surprising as it may seem, Intel's answer isn't to push for ever increasing frequencies. With some nifty charts and graphs, Pat showed us that we wouldn't be able to rely on increases in clock frequency giving us the same increases in performance as we have had in the past. The graphs showed the power density of Intel processors approaching that of the sun if it remains on its current trend, as well as a graph showing that the faster a processor, the more cycles it wastes waiting for data from memory (since memory latency hasn't decreased at the same rate as clock speed has increased). Also, as chips are fabbed with smaller and smaller processes, increasing clock speeds will lead to problems with moving data across around a chip in less than one clock cycle (because of interconnect RC delays)."

    Of course, this is nothing new. Intel has been pursuing clock speed with P4 and parallelism with P-M and Itanium. In an ideal world, you would have Pentium M/Athlon IPS with P4 clock speeds. Anyway, it looks like programmers (WOOHOO - THAT'S ME!) are going to become more important than ever in the future processor wars. Writing software to properly take advantage of multiple threads is still an enormously difficult task.

    Then again, if game developers for example would give up on the "pissing contest" of benchmarks and code their games to just run at a constant 100 FPS max, it might be less of an issue. If CPUs get fast enough that they can run well over 100 fps on games, then they could stop being "Real Time Priority" processes.

    It really irks me that most games suck up 100% of the processor power. If I could get by with 30% processor usage and let the rest be multi-tasked out to other threads while maintaining a good frame rate, why should the game not do so? This is especially annoying on games that aren't real-time, like the turn-based strategy games.
  • TrogdorJW - Tuesday, February 24, 2004 - link

    "As for an example of synthesis, we were shown a demo of realtime raytracing. Visualization being the infinitely parallelizable problem that it is, this demo was a software renderer running on a cluster of 23 dual 2.2GHz Xeon processors. The world will be a beautiful place when we can pack this kind of power into a GPU and call it a day."

    Heheheh.... I like that. It's a real-time raytracing demo! Woohoo! I've heard people talk about raytracing being a future addition to graphics cards. If you assume that the GPU with specialized hardware could do raytracing ten times faster than the software on the Xeons, we'll still need 5 GHz graphics chips to pull it off. Or two chips running at 2.5 GHz? Still, the thought of being able to play a game with Toy Story quality graphics is pretty cool. Can't wait for 2010!
  • Shuxclams - Tuesday, February 24, 2004 - link

    Oops, no comment before. Am I seeing things or do I see a southbridge, northbridge and memory controller?








    SHUX
  • Shuxclams - Tuesday, February 24, 2004 - link

  • HammerFan - Tuesday, February 24, 2004 - link

    Intel probably won't use an onboard mem controller for a long time...i've heard that their first experiences with them weren't good. Also, the northbridges are way too big to no have a mem controller on board.
    *new topic*
    That BTX case looks wacky to me...why such a big heatsink for the CPU?
    *new topic*
    I have the same question Cygni had: Are their any CTs in these pictures, or are there none out-and-about yet?
  • Ecmaster76 - Tuesday, February 24, 2004 - link

    I counted eight dimms on the first board and either six or eight on the second one. Dual core memory controller? If so it would help Intel keep the Xeon from being spanked by Opteron as they scale.
  • capodeloscapos - Tuesday, February 24, 2004 - link

    Quote: " It is possible that future games (and possibly games ported by lazy console developers) may want to use the CPU and main memory a great deal and therefore benefit from PCI Express"

    cough!, Halo, Cough!, Colin McRae 3, cough!...
    :)
  • Cygni - Tuesday, February 24, 2004 - link

    I like the attempt to hide the number of DIMM slots... but i think its still pretty easy to tell how many are there, becaouse of the top of the slots still showing, as well as a little of the bottom of the last slot.

    So, is Intel trying to hide that Lindenhurst is 64bit (XeonCE) compatible, or am i off base here?

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