Samsung SSD 840 EVO mSATA (120GB, 250GB, 500GB & 1TB) Review

The NAND: Going Vertical, Not 3D (Yet)

Since we are dealing with a fixed number of NAND packages (unless you want to do Mushkin's and build a dual-PCB design), there are two ways to increase the capacity. One is to increase the capacity per die, which is what has been done before. This is a logical way as the lithographies get smaller (3Xnm was 32Gb, 2Xnm 64Gb and now 1X/2Ynm 128Gb) and you can double the capacity per die while keeping the die are roughly the same as with the previous process node. However, it's not very efficient to increase the capacity per die unless there is a die shrink because otherwise the end result is a large die, which is generally bad for yields and that in turn is bad for financials. Since we are still moving to 128Gb die (Samsung and IMFT have moved already, Toshiba/SanDisk and SK Hynix are still using 64Gb), moving to 256Gb die this quickly was out of question. I do not expect 256Gb die to happen until 2015/2016 and it may well be that we will not even see manufacturers going past 128Gb at that point. We'll see a big push for 3D NAND during the next few years and I am not sure if planar NAND will get to a point where 256Gb die becomes beneficial. 

If you cannot increase the capacity per die, the only way left is to increase the die count. So far the limit has been eight dies and with traditional packaging methods there is already some performance loss after exceeding four dies per package. That is due to the limits of the interconnects that connect the dies to the PCB and as you add more dies the signal integrity degrades and latency goes up exponentially.

Source: Micron

In order to achieve the 1TB capacity with only four NAND packages, Samsung had to squeeze sixteen NAND dies into one package. To my surprise, when I started researching a bit about Samsung's 16-die NAND, I found out that it's actually nothing new. Their always-so-up-to-date NAND part number decoder from August 2009 mentions a 16-die MLC configuration and I managed to find TechInsights' report of a 512GB SSD used in 2012 Retina MacBook Pro with x-ray shots of a 16-die NAND package. That is a SSD 830 based drive, so I circled back to check the NAND used in the 512GB SSD 830 and it indeed has sixteen 32Gb dies per package too. 

Courtesy of TechInsights

I also made a graph based on the x-ray shot since it's not exactly clear unless you know what you're looking for.

Unfortunately I couldn't find any good x-ray shots of other manufacturers' NAND to see if Samsung's packaging method is different, which would explain their ability to ship a 16-die package with no significant performance loss. However, what I was able to find suggested that others use similar packaging (i.e. an inclinated tower of dies with interconnects falling from both sides). Samsung is also very tight-lipped about their NAND and the technologies involved, so I've not been able to get any details out of them. Anand is meeting with their SSD folks at CES and there is hope that he will be able to convince them to give us even a brief overview.

I am thinking this is not strictly hardware related but software too. In the end, the problem is signal integrity and latency, both which can be overcome with high quality engineering. The two are actually related: Poor signal integrity means more errors, which in turn increases latency because it's up to the ECC engine to fix the error. The more errors there are, the longer it obviously takes. With an effective combination of DSP and ECC (and a bunch of other acronyms), it's possible to stack more dies without sacrificing performance. Samsung's control over the silicon is a huge help here -- ECC needs to be built into the hardware to be efficient and since it's up to Samsung to decide how much resources and die area they want to devote to ECC, they can make it happen.