AMD’s Reach and Ecosystem

As mentioned at the top of the piece, the big launch for AMD this year is the server platform. EPYC has an opportunity to reinvigorate AMD’s bottom line to the tune of several billion dollars a year, if they can get traction in the market. Depending on which Analyst you speak to, some are predicting anywhere from a 5% to a 25% gain in market share for AMD, into a ~$25B total addressable market. Given AMD’s worth, that would mean that the balance sheet in a few years might look as if 80% of it is provided by the server team.

As part of the launch today, AMD is announcing partners working with them to optimize the platform for various workloads. Sources say that this includes all the major cloud providers, as well as all the major OEMs. We saw several demo systems at the launch event with partners as well, such as HPE and Dell.


Using SME/SVE with Samsung


The variety of internal systems used by AMD for the demonstrations (some Dell/HP logos)


Security Demonstration


Using 8 VMs to compile the Linux Kernel in one go on AMD vs Intel 2P systems

Of course, the big question is if AMD is actually getting in significant orders for processors. Nothing is public on that yet, and we are told that they are likely to be nearer the end of the year. We are eagerly waiting to test the processors when our review systems arrive, and we will provide our performance breakdown soon.

Power Management and Performance
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  • vladx - Tuesday, June 20, 2017 - link

    Lol what a shady move from AMD to reduce Intel CPUs' benchmark numbers in order to make Epyc appear better than it actually is, never change AMD never change.
  • tamalero - Tuesday, June 20, 2017 - link

    COUGH COUGH COUGH Yeah, because Intel never has done the same.. COUGH COUGH COUGH..
    https://www.extremetech.com/computing/193480-intel...

    https://www.theinquirer.net/inquirer/news/1567108/...
  • vladx - Tuesday, June 20, 2017 - link

    First there's a big difference between straight-out misleading customers and making backside deals with OEMs, and second that compiler crippling stuff is still unsubstantiated and Intel has no obligation towards AMD with regards to Intel's own compiler. AMD should make their own compiler that offers better or at least equal to Intel's own optimizations instead of using disgraceful tactics like that.
  • galahad05 - Wednesday, June 21, 2017 - link

    How's Intel doing fighting that enormous fine the EU levied against it for their underhanded tactics against AMD years ago?
  • vladx - Wednesday, June 21, 2017 - link

    Afaik they paid billions which AMD squandered like it was nothing.
  • galahad05 - Wednesday, June 21, 2017 - link

    Um.... Where to begin?
    The fine doesn't go to AMD. It goes to the European Commission....
    So far Intel's lawyers have held the EC at bay all these years. Which technically means Intel got away with it....

    Such is life.
  • Mugur - Wednesday, June 21, 2017 - link

    What I don't understand from the slide with the prices: it looks like the 1P cpu is priced higher ($750 versus $650) than the 2P counterpart? I assume that any 2P cpu could be used in a 1P motherboard, but not the other way around.
  • Zizy - Wednesday, June 21, 2017 - link

    Well, the corresponding 2P part is >1.1k, so 1P is cheaper. No idea why there isn't 7301P instead and slightly cheaper than the bottom 2P, but I guess that 7351P looks better on the 2P vs 1P.
  • 1008anan - Wednesday, June 21, 2017 - link

    Trying to calculate how many 32 bit floating point operations (FPO) a zen server completes per second:

    Assume a 2 socket Zen server with two 32 core chips; operating at 2.5 gigahertz:
    512 bits wide vector, Fused Multiply Add, two FPO per clock = 64 FPO per clock = 512/32 * 2 * 2.
    64 FPO/clock * 32 cores = 2048 FPO/clock
    2048 FPO/clock * 2 sockets = 4096 FPO/clock
    4096 FPO/clock * 2.5 gigahertz = 10 trillion FPO/second = 10 teraflops

    Is this accurate? Is Zen approximately the same number of FLOPS as Skylake E5/E7?
  • edzieba - Wednesday, June 21, 2017 - link

    An interesting diagram lurking on the corner of this slide: http://images.anandtech.com/doci/11551/epyc_tech_d...

    Could just be that the diagram is nonsense marketing bling, but that sure looks like external lanes are connected to only two of the 4 cores, with the remaining two getting 'passthrough' lanes.

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