Multi-Threaded Integer Performance on one core: SPEC CPU2006

Broadly speaking, the value of SPEC CPU2006's int rate test is questionable, as it puts too much emphasis on bandwidth and way too little emphasis on data synchronization. However, it does give some indication of the total "raw" integer compute power available.

We will make an attempt to understand the differences between IBM and Intel, but to be really accurate we would need to profile the software and runs dozens of tests while looking at the performance counters. That would have set back this article a bit too much. So we can only make an educated guess based upon what the existing academic literature says and our experiences with both architectures.

The Intel CPU performance is the 100% baseline in each column.

Subtest
SPEC CPU2006
Integer
Application
Type
IBM
POWER8
vs
Xeon E5-2699v4
Single
Thread
IBM
​POWER8
vs
Xeon E5-2699v4
Max
Thread
IBM
​POWER8
vs
Xeon E5-2699v4
Top
performance
400.perlbench Spam filter N/A N/A N/A
401.bzip2 Compress 91% 139% 139%
403.gcc Compiling 111% 185% 185%
429.mcf Vehicle scheduling 121% 167% 167%
445.gobmk Game AI 90% 156% 156%
456.hmmer Protein seq. analyses 79% 79% 101%
458.sjeng Chess 69% 117% 117%
462.libquantum Quantum
sim
76% 160% 162%
464.h264ref Video encoding 80% 120% 131%
471.omnetpp Network
sim
100% 141% 141%
473.astar Pathfinding 87% 156% 156%
483.xalancbmk XML processing 70% 116% 116%

On (geometric) average, a single thread running on the IBM POWER8 core runs about 13% slower than on an Intel Broadwell architecture core. So our suspicion that Intel is still a bit better at extracting parallelism when running a single thread is confirmed.

Intel gains the upper-hand in the applications where branch prediction plays an important role: chess (sjeng), pathfinding (astar), protein seq. analysis (hmmer), and AI (gobmk). Intel's branch misprediction penalty is lower if the other branch is available in the µop cache (the Decode Stream Buffer) and Intel has a few clever tricks that the IBM core does not have like the loop stream detector.

Where the POWER8 core shines is in the benchmarks where memory latency is important and where the load units are a bottleneck, like vehicle scheduling (mcf). This is also true, but in lesser degree, for the network simulation (omnetpp). The reason might be that omnetpp puts a lot of pressure on the OoO buffers, and Intel's architecture offers more room with its unified buffers, whereas IBM POWER8's buffers are more partitioned (see for example the issue queue). Meanwhile XML processing does a lot of pointer chasing, but quick profiling has shown that this benchmark mostly hits the L2, and somewhat the L3. So there's no disadvantage for Intel there. On the flip side, Xalancbmk is the benchmark with the highest pressure on the ROB. Again, the larger OOO buffers for one thread might help Intel to do better.

POWER8 also does well in GCC, which has a high percentage of branches in the instruction mix, but very few branch mispredictions. GCC compiling is latency sensitive, so a 3 cycle L1, a 13 cycle L2, and the fast 8MB L3 help.

Finally, the pathfinding (astar) benchmark does some intensive pointer chasing, but it misses the L1- and L2-cache much less often than xalancbmk, and has the highest amount of branch misprediction. So the impact of the pointer chasing and memory latency is thus minimal.

Once all threads are active, the IBM POWER8 core is able to outperform the Intel CPU by 41% (geomean average).

Single-Threaded Integer Performance: SPEC CPU2006 Closing Thoughts
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  • DomOfSF - Thursday, July 21, 2016 - link

    Johan de Gelas: blowing minds and educating "the rest of us" since...I dunno, a really long time ago (especially in internet years). Great job on the data, but the real good stuff is in your thoughts and analysis. Thank you!
  • close - Saturday, July 23, 2016 - link

    Over a decade...
  • JohanAnandtech - Thursday, July 28, 2016 - link

    13 years in the server business, 18 years now of reviewing hardware :-). Thx !!
  • jamyryals - Thursday, July 21, 2016 - link

    It seems to me, Intel's focus on bringing their CPU architecture design all the way down to 5W is the reason IBM is able to stand out against them. Intel is focused on creating a scalable architecture while IBM can throw the whole kitchen sink at the server market.

    Fascinating article, I really enjoyed it.
  • smilingcrow - Thursday, July 21, 2016 - link

    Intel has plenty of unique features in their server platforms which aren't in the consumer platforms so I don't think that is the issue.
  • jospoortvliet - Tuesday, July 26, 2016 - link

    The basic design of the core still is the same so there is probably at least some truth in the statement of Jamy.
  • Kevin G - Wednesday, July 27, 2016 - link

    Up until this point. Consumer SkyLake and server SkyLake are going to be two different designs. They're certainly related but server SkyLake will have 512 KB of L2 cache per core and support AVX-512 instructions.

    Server SkyLake is also going to support 3D Xpoint DIMMs, though that difference is more with the platform/chipset than the actual CPU core.
  • floobit - Thursday, July 21, 2016 - link

    Very interesting. It seems odd to me that they chose to configure it in a 2U - except for big data clusters, most of the market space I see this playing is dominated by FC to a SAN. Is this a play in the big data cluster space, or the more traditional AIX/DB2/big iron that IBM has owned for so long?
    Some questions I'd have:
    what virtualization is possible with this architecture? presumably just the standard PowerVM? How well does that work?
    What is the impact of IO latency? Could you throw a P3700 or two in here?
  • JohanAnandtech - Thursday, July 21, 2016 - link

    2U: Besides big data storage needs, I suspect 2U is necessary for adequate cooling for the POWER8 chip.

    Virtualization: Linux KVM works well as far as I know.

    We actually tried out a P3700 in there (see: http://www.anandtech.com/show/9567/the-power-8-rev... ) and it worked very well. I asked IBM what a customer should expect when using third party storage (probably no support, but how about waranty?) but no answer yet.
  • mystic-pokemon - Friday, July 22, 2016 - link

    Hi Johan
    2U is not necessary for cooling a POWER 8 Chip. We do that better with our Barreleye (1.25 OU design). Even storage wise Barreleye has 15 Disk storage bay that can be seen in below links.

    http://www.v3.co.uk/v3-uk/news/2453992/google-and-...

    Let me know if you wanna ever benchmark a Barreleye. What specific POWER8 proc are you benchmarking with ? (Turismo?). I believe it does slightly better than S812LC on many benchmarks based on the variant of power8 proc S812LC runs.

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