Intel Developer Forum Spring 2004 - Day 2: Roadmap Updatesby Derek Wilson on February 19, 2004 12:47 PM EST
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The day two keynote wasn't quite as eventful as the keynote of Tuesday. Basically, Mike Fister, Bill Siu, and Anand Chandrasekher brought us up to speed on all the developing technologies and initiatives emphasized last Fall. The phrases we heard most often in the keynote were very similar to "as we indicated last IDF." We heard about Vanderpoolagain, this time with the corporate environment being emphasized rather than home use. La Grande was mentioned again as an important factor in future secure computing, but nothing really new was introduced. The possible downsides of the technology still haven't been addressed, but all this stuff is still very much in its infancy and is likely to evolve a great deal before anything solid comes about.
Of course, roadmaps were updated. We have been filled in on the holes that were left by the introduction of 64bit extensions, and Mike Fister gave us the code names of the dual processing and low voltage IA-64 processors in development, as well as the Bayshore (PCIe and DDR2) platform for Itanium processors. There was also mention of visualization technology Silvervale, and reliability hardware Pellston of we know exactly as much as this sentence conveys. Fully buffered DDR2 DIMMs are also being placed on the map for enterprise platforms as well.
Dothan is apparently ready for a "quick ramp" according to Anand, while we can expect the Sonoma mobile platform to be available in the second half of the year bringing all its enhancements to Centrino.
We got another look at a rundown of the 64bit extensions Intel has implemented in the Prescott and Nocona cores which looks very much like it could have been a slide from AMD a few years back.