When it comes to memory overclocking, there are several ways to approach the issue.  Typically memory overclocking is rarely required - only those attempting to run benchmarks need worry about pushing the memory to its uppermost limits.  It also depends highly on the memory kits being used - memory is similar to processors in the fact that the ICs are binned to a rated speed.  The higher the bin, the better the speed - however if there is a demand for lower speed memory, then the higher bin parts may be declocked to increase supply of the lower clocked component.  Similarly, for the high end frequency kits, less than 1% of all ICs tested may actually hit the speed of the kit, hence the price for these kits increase exponentially.

With this in mind, there are several ways a user can approach overclocking memory.  The art of overclocking memory can be as complex or as simple as the user would like - typically the dark side of memory overclocking requires deep in-depth knowledge of how memory works at a fundamental level.  For the purposes of this review, we are taking overclocking in three different scenarios:

a) From XMP, adjust Command Rate from 2T to 1T
b) From XMP, increase Memory Speed strap (e.g. 1333 MHz -> 1400 -> 1600)
c) From XMP, decrease main sub-timings (e.g. 10-12-12 to 9-11-11 to 8-10-10)

There is plenty of scope to overclock beyond this, such as adjusting voltages or the voltage of the memory controller.  As long as a user is confident with adjusting these settings, then there is a good chance that the results here will be surpassed.   There is also the fact that individual sticks of memory may perform better than the rest of the kit, or that one of the modules could be a complete dud and hold the rest of the kit back.  For the purpose of this review we are seeing if the memory out of the box, and the performance of the kit as a whole, will work faster at the rated voltage.

In order to ensure that the kit is stable at the new speed, we run the Linpack test within OCCT for five minutes.  This is a small but thorough test, and we understand that users may wish to stability test for longer to reassure themselves of a longer element of stability.  However for the purposes of throughput, a five minute test will catch immediate errors from the overclocking of the memory.

With this in mind, the kits performed as follows:

F3-1333C9Q-16GAO - rated at DDR3-1333 9-9-9-24 2T 1.50 volts

Adjusting from 2T to 1T: Passes Linpack
Adjusting from 1333 to 1400: Passes Linpack
Adjusting from 1333 to 1600: No Boot
Adjusting from 9-9-9 to 8-8-8: Linpack Error

F3-12800CL9Q-16GBXL - rated at DDR3-1600 9-9-9-24 2T 1.50 volts

Adjusting from 2T to 1T: Passed Linpack
Adjusting from 1666 to 1800: No boot
Adjusting from 9-9-9 to 8-8-8: No boot

F3-14900CL9Q-16GBSR - rated at DDR3-1866 9-10-9-28 2T 1.50 volts

Adjusting from 2T to 1T: Passes Linpack
Adjusting from 1866 to 2000: No boot
Adjusting from 9-10-9 to 8-9-8: No boot

F3-17000CL9Q-16GBZH - rated at DDR3-2133 9-11-10-28 2T 1.65 volts

Adjusting from 2T to 1T: Passes Linpack
Adjusting from 2133 to 2200: Passes Linpack
Adjusting from 2133 to 2400: No Boot
Adjusting from 9-11-10 to 9-9-9: No boot
Adjusting from 9-11-10 to 8-11-10: No boot

F3-2400C10Q-16GTX - rated at DDR3-2400 10-12-12-31 2T 1.65 volts

Adjusting from 2T to 1T: Passes Linpack
Adjusting from 2400 to 2600: No boot
Adjusting from 10-12-12 to 9-11-11: No boot

Rendering Conclusions
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  • jwilliams4200 - Friday, October 19, 2012 - link

    You are also incorrect, as well as highly misleading to anyone who cares about practical matters regarding DRAM latencies.

    Reasonable people are interested in, for example, the fact that reading all the bytes on a DRAM page takes significantly less time than reading the same number of bytes from random locations distributed throughout the DRAM module.

    Reasonable people can easily understand someone calling that difference sequential and random read speeds.

    Your argument is equivalent to saying that no, you did not shoot the guy, the gun shot him, and you are innocent. No reasonable person cares about such specious reasoning.
  • hsir - Friday, October 26, 2012 - link

    jwilliams4200 is absolutely right.

    People who care about practical memory performance worry about the inherent non-uniformity in DRAM access latencies and the factors that prevent efficient DRAM bandwidth utilization. In other words, just row-cycle time (tRC) and the pin bandwidth numbers are not even remotely sufficient to speculate how your DRAM system will perform.

    DRAM access latencies are also significantly impacted by the memory controller's scheduling policy - i.e. how it prioritizes one DRAM request over another. Row-hit maximization policies, write-draining parameters and access type (if this is a cpu/gpu/dma request) will all affect latencies and DRAM bandwidth utilization. So just sweeping everything under the carpet by saying that every access to DRAM takes the same amount of time is, well, just not right.
  • nafhan - Friday, October 19, 2012 - link

    I was specifically responding to your incorrect definition of "random access". Randomness doesn't guarantee timing; it just means you can get to it out of order.
  • jwilliams4200 - Friday, October 19, 2012 - link

    And yet, by any practical definition, you are incorrect and the author is correct.

    For example, if you read (from RAM) 1GiB of data in sequential order of memory addresses, it will be significantly faster than if you read 1GiB of data, one byte at a time, from randomly selected memory addresses. The latter will usually take two to four times as long (or worse).

    It is not unreasonable to refer to that as the difference between sequential and random reads.

    Your argument reminds me of the little boy who, chastised by his mother for pulling the cat's tail, whined, "I didn't pull the cat's tail, I just held it and the cat pulled."
  • jwilliams4200 - Thursday, October 18, 2012 - link

    Depending on whether there is a page-hit (row needed already open), page-empty (row needed not yet open), or page-miss (row needed is not the row already open), the time to read a word can vary by a factor of 3 times (i.e., 1x latency for a page-hit, 2x latency for a page-empty, and 3x latency for a page-miss).

    What the author refers to as a "sequential read" probably probably refers to reading from an already open page (page-hit).

    While his terminology may be ambiguous (and his computation for the "sequential read" is incorrect, it should be 4 clocks), he is nevertheless talking about a meaningful concept related to variation on latency in DRAM for different types of reads.

    See here for more detail:

    http://www.anandtech.com/show/3851/everything-you-...
  • Shadow_k - Thursday, October 18, 2012 - link

    My knowledge of RAM has increased 10 fold very nice artical well done
  • losttsol - Thursday, October 18, 2012 - link

    2133MHz "Recommended for Deeper Pockets"???

    Not really. DDR3 is so cheap now that high end RAM is affordable for all. I would have said you were crazy a few years ago if you told me soon I could buy 16GB of RAM for less than $150.
  • IanCutress - Thursday, October 18, 2012 - link

    Either pay $95 for 1866 C9 or $130 for 2133 C9 - minor differences, but $35 saving. This is strictly talking about the kits used today, there could be other price differences. But I stand by my recommendation - for the vast majority of cases 1866 C9 will be fine, and there is a minor performance gain in some scenarios with 2133 C9, but at a $35 difference it is hard to justify unless you have some spare budget. Most likely that budget could be put into a bigger SSD or GPU.

    Ian
  • just4U - Friday, October 19, 2012 - link

    Something has to be said about the TridentX brand I believe.. since it is getting some pretty killer feedback. It's simply the best ram out there being able to do all that any other ram can and that little bit extra. I don't see the speed increase as a selling point but the lower timings at conventional speeds that users are reporting is interesting.. I haven't tried it though.. just going on what I've read. Shame about the size of the heatsinks though.. makes it problematic in some builds.
  • Peanutsrevenge - Friday, October 19, 2012 - link

    You clearly live in some protected bubble where everyone has well paid jobs and isn't on a shoestring budget.

    I would so LMAO when you get mugged by someone struggling to feed themselves because you're all flash with your cash.

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