A Quick Path to Memory

Our investigation begins with the most visibly changed part of Nehalem's architecture: the memory subsystem. Nehalem implements a very Phenom-like memory hierarchy consisting of small, fast individual L1 and L2 caches for each of its four cores and then a single, larger shared L3 cache feeding the entire chip.

 

Nehalem's L1 cache, despite being seemingly unchanged from Penryn, does grow in latency; it now takes 4 cycles to access vs. 3. The L2 cache is now only 256KB per core instead of being 24x the size in Penryn and thus can be accessed in only 11 cycles down from 15 (Penryn added an additional clock cycle over Conroe to access L2).

 CPU / CPU-Z Latency L1 Cache L2 Cache L3 Cache
Nehalem (2.66GHz) 4 cycles 11 cycles 39 cycles
Core 2 Quad Q9450 - Penryn - (2.66GHz) 3 cycles 15 cycles N/A

 

The L3 cache is quite possibly the most impressive, requiring only 39 cycles to access at 2.66GHz. The L3 cache is a very large 8MB cache, 4x the size of Phenom's L3, yet it can be accessed much faster. In our testing we found that Phenom's L3 cache takes a similar 43 cycles to access but at much lower clock speeds (2.0GHz). If we put these numbers into relative terms it takes 21.5 ns to get a request back from Phenom's L3 vs. 14.6 ns with Nehalem's - that's nearly 50% longer in Phenom.

While Intel did a lot of tinkering with Nehalem's caches, the inclusion of a multi-channel on-die DDR3 memory controller was the most apparent change. AMD has been using an integrated memory controller (IMC) since 2003 on its K8 based microprocessors and for years Intel has resisted doing the same, citing complexities in choosing what memory to support among other reasons for why it didn't follow in AMD's footsteps.

With clock speeds increasing and up to 8 cores (including GPUs) making their way into Nehalem based CPUs in the coming year, the time to narrow the memory gap is upon us. You can already tell that Nehalem was designed to mask the distance between the individual CPU cores and main memory with its cache design, and the IMC is a further extension of the philosophy.

The motherboard implementation of our 2.66GHz system needed some work so our memory bandwidth/latency numbers on it were way off (slower than Core 2), luckily we had another platform at our disposal running at 2.93GHz which was working perfectly. We turned to Everest Ultimate 4.50 to give us memory bandwidth and latency numbers from Nehalem.

Note that these figures are from a completely untuned motherboard and are using DDR3-1066 (dual-channel on the Core 2 system and triple-channel on the Nehalem system):

 CPU / Everest Ultimate 4.50 Memory Read Memory Write Memory Copy Memory Latency
Nehalem (2.93GHz) 13.1 GB/s 12.7 GB/s 12.0 GB/s 46.9 ns
Core 2 Extreme QX9650 - Penryn - (3.00GHz) 7.6 GB/s 7.1 GB/s 6.9 GB/s 66.7 ns

 

Memory accesses on Conroe/Penryn were quick due to Intel's very aggressive prefetchers, memory accesses on Nehalem are just plain fast. Nehalem takes a little over 2/3 the time to complete a memory request as Penryn, and although we didn't have time to run comparable Phenom numbers I believe Nehalem's DDR3 memory controller is faster than Phenom's DDR2 controller.

Memory bandwidth is obviously greater with three DDR3 channels, Everest measured around a 70% increase in read bandwidth. While we don't have the memory bandwidth figures here, Gary measured a 10% difference in WinRAR performance (a test that's highly influenced by memory bandwidth and latency) between single-channel and triple-channel Nehalem configurations.

While we didn't really expect Intel to somehow do wrong with Nehalem's memory architecture, it's important to point out that it is very well implemented. Intel managed to change the cache structure and introduce an integrated memory controller while making both significantly faster than what AMD managed despite a four-year headstart.

In short: Nehalem can get data out of memory quick like bunnies.

The Return of Hyper Threading Nehalem's Media Encoding Performance
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  • Justin Case - Sunday, June 08, 2008 - link

    The chances of AMD dying are approximately... zero. The question is whether they stay as an independent company or get bought by someone else. Their IP and patent portfolio alone are worth more than the company's current value, even if they didn't sell a single CPU and didn't have any fabs.

    The top candidate is Samsung, followed by IBM, followed by the UAE. But the real nightmare scenario is this: Microsoft buys AMD, and slowly makes its software incompatible with (or run much slower on) everyone else's CPUs. After that, they have zero incentive to improve the chips, because no one else can compete anyway.

    Since it's been shown that Microsoft can violate antitrust legislation as much as it wants (as long as it pays off a few senators), this is not at all impossible. Be afraid. Be very afraid.
    Reply
  • VooDooAddict - Monday, June 09, 2008 - link

    That would be the beginning of the end for MS.

    MS buys AMD? .... that would be the day I buy a fully loaded Mac Pro.
    Reply
  • Griswold - Friday, June 06, 2008 - link

    Listenting to whom? Somebody as naive and clueless as you, who apparently believes breaking laws in the past should be forgiven and forgotten until there is no competition at all, because the market will magically make things work out perfectly for the customer anyway...?
    Reply
  • n0b0dykn0ws - Thursday, June 05, 2008 - link

    If Nehalem comes out and does run circles around current processors, then we're better off, right?

    The only problem is that Intel is holding back on it's CPUs.

    Without competition, Intel will only give us 'just a little taste'.

    Me personally? I want the full strength version at today's prices.

    n0b0dykn0ws
    Reply
  • Rev1 - Monday, June 09, 2008 - link

    AMd is still competitive in the price segment of lower end cpu's, and after the PT4 debacle intel doesnt wanna loosen it's grip anytime soon to AMD. Reply
  • Zurtex - Thursday, June 05, 2008 - link

    You've written:

    "Encoding performance here went through the roof with Nehalem: a clock for clock boost of 44%."

    But your graph shows the exact opposite. I'm assuming you just got the numbers on the graph the wrong way around, rather than your analysis mixed up.
    Reply
  • Ryan Smith - Thursday, June 05, 2008 - link

    Uh, sometimes bits get flipped when in transfer from Taiwan, yeah, that's it.

    Anyhow, thanks for the notice. Fixed.
    Reply
  • 8steve8 - Thursday, June 05, 2008 - link

    exactly what I expected.

    imc was long overdue for intel...


    can't wait to buy one, but I've been hearing us mere consumers wont be able to until well into 09?

    Reply

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