JEDEC made two important announcements about the future of DRAM and non-volatile DIMMs for servers last week. Development of both is proceeding as planned and JEDEC intends to preview them in the middle of this year and publish the final specifications sometimes in 2018. Traditionally each new successive DRAM memory standard aims for consistent jumps: doubling the bandwidth per pin, reducing power consumption by dropping Vdd/Vddq voltage, and increasing the maximum capacity of memory ICs (integrated circuits). DDR5 will follow this trend and JEDEC last week confirmed that it would double the bandwidth and density over DDR4, improve performance, and power efficiency. Given that official DDR4 standard covers chips with up to 16 Gb capacity and with up to 2133-3200 MT/s data rate per pin, doubling...
There is no Moore's Law for flash memory. Unlike transistors, flash memory cells can no longer be made any smaller or faster without incurring reliability tradeoffs that negate the...7 by Billy Tallis on 11/17/2016
Since they first started showing up on the market, most smartphones and tablets have used eMMC flash storage. While in some ways similar to the NAND flash used in...8 by Jarred Walton on 1/14/2014