Gaining more from Hyper-Threading

Did Intel create Hyper-Threading just for their server line of CPUs? Of course not, they wouldn't have wasted any additional die space on the rest of their CPUs had this been the case. In fact, the NetBurst architecture behind the Pentium 4 and Xeon processors is actually perfect for a SMT enabled core. Let's take our theoretical CPU for one last test; this time we'll give it one more execution unit, a second ALU and let's see what happens when we run those two threads on it:

Voila! With a second ALU the only conflict we have left is that final store. Our CPU should begin to remind you of a Pentium 4 which happens to have three integer units (two ALUs and one slower integer unit for shifts/rotates). Even more important is the fact that the Pentium 4's two ALUs can each execute 2 micro-ops per clock, meaning that two ADD instructions each one from two different threads could execute in a single clock on the Pentium 4/Xeon.

But this still doesn't solve our problem; it wouldn't make much sense to keep on outfitting the CPU with more and more execution units in order to gain a performance benefit with Hyper-Threading enabled; that would be too costly from a die standpoint. Instead, Intel is encouraging developer optimization for Hyper-Threading.

Using the HALT instruction it is possible to halt one of the logical processors, thus maximizing performance in applications that would not benefit from Hyper-Threading. So instead of an application becoming slower with Hyper-Threading enabled, one of the logical CPUs will simply be halted and the performance will be equivalent to a single CPU system. Then when an application or task comes around that could benefit from Hyper-Threading, the second logical processor will resume operation.

Intel has a very useful presentation on exactly how developers can code with Hyper-Threading in mind on their Developer website.

Understanding Hyper-Threading: It's not a perfect world Final Words
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