Hardware Behind the Consoles - Part II: Nintendo's GameCubeby Anand Lal Shimpi on December 7, 2001 3:44 AM EST
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"If cache is so fast, then why isn't everything made out of it?"
One of the most interesting things about the GameCube design is its focus on memory bandwidth efficiency. It attains this efficiency through the use of a special type of memory known as 1T-SRAM that offers lower latency operation and higher overall bus utilization than conventional DRAM. But before you understand exactly what that is, you have to look at the differences between conventional DRAM and SRAM.
The cache on the die of the Gekko CPU or any other CPU for that matter is a type of RAM known as Static RAM or SRAM. The prefix static comes from the fact that unlike DRAM (Dynamic Random Access Memory), SRAM cells do not have to be constantly "refreshed" in order to retain their data (since DRAM is capacitance based, it loses its charge after a while requiring a refresh of that charge in order to retain its data). One of the reasons DRAM is so much slower than SRAM is because of this constant refreshing process. It turns out that when reading the contents of a DRAM cell, the cell is actually refreshed making the most common way of refreshing DRAM cells to actually read the contents of the cell.
This is perfectly fine except for when the contents of the cells being refreshed are being read from or written to. SRAM avoids this by using a combination of usually 4 to 6 transistors to statically hold the data being stored in the memory. DRAM on the other hand only uses a single transistor in combination with a capacitor to hold data; the introduction of the capacitor greatly reduces the die size of DRAM cells thus making them cheaper to manufacturer but also introduces the problem of refreshing as we mentioned above.
Here you can see the problem with conventional SRAM being used in mass quantities since you can get multiple times the amount of SRAM out of DRAM at the same cost. The cost of SRAM prohibits it from being used as a main memory solution, but it makes perfect sense for use in small amounts such as in a cache.
A company by the name of Monolithic System Technology, Inc. (MoSys) came up with a clever design for DRAM that give it many of the performance benefits of SRAM without incurring a huge cost penalty.
The technology that has garnered all of the attention for MoSys is what they like to call 1T-SRAM. The name implies that they have been able to produce SRAM using only a single transistor (1T) instead of the 6 transistors that are much more common. The reality of the situation is that 1T-SRAM is much more like a special form of DRAM than it is like SRAM. The reason being that 1T-SRAM still requires its memory cells to be refreshed in order to retain their data, the only difference being in its very efficient method of refreshing those cells. According to MoSys, their 1T-SRAM design can hide the refresh process quite effectively to the point where they can claim latency and bandwidth figures that would rival those of conventional SRAM (although not surpass). Obviously it's very difficult to test since there have been very few cases where 1T-SRAM has been used in a testable platform, but it's clear that the technology does allow for lower latency accesses and higher memory bandwidth utilization. But at what cost?
MoSys claims that a 64Mbit 1T-SRAM has a die that is 10 - 15% larger than a 64Mbit SDRAM. While that may not seem like much, do keep in mind that a 64Mbit RDRAM device is 15 - 30% larger than the same 64Mbit SDRAM. This would put the additional cost in terms of die size of 1T-SRAM equal to anywhere between 1/3 and 1/1 of the added cost of RDRAM (production cost excluding license royalties) over SDRAM. However, 1T-SRAM is still cheaper than regular SRAM again because of the fact that it is manufactured using a single transistor vs. 6 for most SRAM designs.
The performance aspects of 1T-SRAM are very difficult to quantify because we've never seen it on a benchmarkable platform making the assessment of its value equally difficult. Needless to say that we didn't present you with this explanation for no reason, as Nintendo saw it fit to make heavy use of MoSys' 1T-SRAM in their GameCube design.