Updated: Page 3 has been updated to include an official AMD response on the Brisbane performance issues we've been seeing. AMD confirmed an increase in L2 cache latency in order to support a move to larger cache sizes in the future, which may or may not happen. The rest of the article remains unchanged.

Last week AMD sent us samples of its first 65nm processors, codenamed Brisbane, and it was a step towards being competitive with Intel again. The 65nm shrink yielded AMD's most efficient desktop processor to date, but it's still a far cry away from what Intel is able to accomplish with its Core 2 processors.

Although they won't be available until sometime next year, a closer look at AMD's 65nm lineup reveals an interesting fact. Until recently, AMD would differentiate between subsequent model numbers by clock speed and cache size, alternating between the two. So while the Athlon 64 X2 4600+ and 4800+ both ran at 2.4GHz, the latter had twice the L2 cache per core at 1MB. After Intel's Core 2 launch, AMD killed all non-FX 1MB L2 parts, resulting in a processor lineup that was mostly segregated according to clock speed. (Of course they then added the X2 5200+ and 5600+ back into the mix....) With the move to 65nm, AMD is once again introducing model numbers that it had killed off before, but without playing with L2 cache sizes; instead, AMD is breaking with recent tradition and implementing non-integer clock multipliers for these "new" in-between speeds. The table below explains it all:

We didn't mention this in the original article, but all of AMD's 65nm CPUs are considered to be Energy Efficient (denoted by the letters EE in the table above). With its 90nm chips, AMD specifically selected lower voltage parts to be labeled as Energy Efficient, but right now all 65nm parts are. For the sake of simplicity, especially as we compare to older EE parts, we will simply refer to these chips as 65nm chips.

Note that the 65nm 4800+, 4400+ and 4000+ all use non-integer clock multipliers, a first for the Athlon 64 line. The implications for the end user are relatively minor, although it does mean that the model numbers will translate into more consistent performance graduations. In the past, having two chips running at the same clock speed but with different cache sizes meant that one would be faster only in those applications that could use the extra cache.

Despite support for non-integer clock multipliers, all AMD chips still only support integer memory dividers, meaning that only CPUs with even CPU multipliers can run at DDR2-800. All odd clocked (5000+) and half-clocked processors (4800+, 4400+, 4000+) run at a slower than DDR2-800 speed, even when set to DDR2-800 in the BIOS. AMD wouldn't discuss whether or not this would be addressed in the future, but if it is we'd have to wait for at least another silicon revision.

By now, none of this is new information, which brings us to why we're here today. In our original 65nm article we noticed a performance disparity between AMD's 65nm and 90nm processors, yet we had no official response from AMD as to why; today we have that answer. At the same time, we wanted to take a look at one of the half-multiplier chips and add it to our performance and power graphs, not to mention include some lower cost Intel CPUs per your requests. We've also got some more insight into the die sizes and power consumption figures we reported in our last article. In a sense, we're tying up loose ends with this piece, and shedding more light on AMD's 65nm cores than we originally did in our first, quick preview.