Intel Demonstrates DDR3 on Desktops

In a peculiar move, Intel is demonstrating a couple of Core 2 systems using the upcoming Bearlake chipset, due out sometime in the middle of 2007. The biggest differentiating feature between the upcoming chipset and the current solutions is official 1333MHz FSB support and DDR3 memory support:

The DDR3 being used was standard 240-pin DDR3 memory running at 1066MHz (CL7). We'd expect to see DDR3-1333 by the time the Bearlake chipsets launch next year, offering a 1:1 ratio with the 1333MHz FSB.

The systems were running a combination of Quake 4 (or Doom 3 depending on the system) and a modified version of CPU-Z to verify DDR3 support. Although Intel wouldn't let us peak inside the cases, there was a live webcam attached that was pointed at the DDR3 modules to remove doubt of any demo system shenanigans.

Unfortunately, lower power consumption may be the only tangible benefit users get from DDR3, as we may not see much of a performance boost since current generation DDR2 platforms aren't exactly memory bandwidth limited themselves. Hopefully Intel has learned from its mistakes with the first DDR2 chipsets and will do what it takes to make the Bearlake family of chipsets a more attractive option upon their introduction.

Final Words

Day two of the Fall Intel Developer Forum is set to begin and there's much more to talk about, we'll report it as soon as we hear it...

Intel Robson Technology
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  • DigitalFreak - Wednesday, September 27, 2006 - link

    Until at least 2008, I bet the VAST majority of multi-threaded games on the PC will be "ports" of Xbox 360 games.
  • NullSubroutine - Wednesday, September 27, 2006 - link

    what say you when AMD's inverted hyper-threading is available? the one that runs 1 thread on multiple cores. the reason why game developers have to start programming multithread games is because in the not to distant future all threads (including video) will be run via multi-cored cpu.
  • johnsonx - Wednesday, September 27, 2006 - link

    it's been stated numerous times that 'inverse' or 'reverse' hyper-threading is nothing more than a myth. No one even knows how it got started, but it may have been a misunderstanding of AMD's Dual Core Optimization utility.
  • ShapeGSX - Wednesday, September 27, 2006 - link

    "Reverse hyperthreading" is just not practical, nor would it give much of a boost in performance. It would take some major communication between cores during instruction fetch, instruction issue, and instruction retire.

    Why wouldn't it give much of a boost? As it is, with 4 issue processors like the Core 2 Duo, it is very hard to find a window of instructions in a program that the processor can issue in parallel. Even now, some execution units are empty during most clock cycles. So what would be the point of trying to do even more in parallel? You would just end up with more empty execution units, but now on 2 or more cores instead of just one.

    This is why multithreading on processors was invented in the first place. It was to fill up empty execution units with work from other threads, which is inherently parallel and doesn't have dependencies.
  • NullSubroutine - Wednesday, September 27, 2006 - link

    so like i was excited about the laser things. i cant wait till i can put those chips inside my mutated seabass (with attached laser also on their head) cybornetic brain. i will have frikin lasers galore!
  • Hypernova - Wednesday, September 27, 2006 - link

    Optical interconnects are perhapes the most important invention right behind IC itself. The next 10 years will be very exciting no doubt.

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