At Flash Memory Summit today, Toshiba announced a new variant of 3D NAND flash memory, XL-Flash. Made with the same basic process as their 96-layer BiCS4 3D NAND, XL-Flash uses shorter bit lines and word lines to build a flash memory die with many more planes than the two or four usually seen on current NAND devices. Toshiba claims that XL-Flash will have one tenth the read latency of TLC NAND, providing better random read IOPS, especially at low queue depths. Toshiba appears to be contemplating both SLC and MLC versions of XL-Flash and varying numbers of planes, but initially XL-Flash will be SLC. XL-Flash sounds very similar to Samsung's Z-NAND concept. Both seek to transform existing NAND flash into something that can compete...

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