The first major release of the Gen-Z systems interconnect specification is now available. The Gen-Z Consortium was publicly announced in late 2016 and has been developing the technology as an open standard, with several drafts released in 2017 for public comment. Gen-Z is one of several standards that emerged from the long stagnation of the PCI Express standard after the PCIe 3.0 release. Technologies like Gen-Z, CAPI, CCIX and NVLink seek to offer higher throughput, lower latency and the option of cache coherency, in order to enable much higher performance connections between processors, co-processors/accelerators, and fast storage. Gen-Z in particular has very broad ambitions to blur the lines between a memory bus, processor interconnect, peripheral bus and even straying into networking territory. The Core Specification released...
Higher bandwidth memory solutions fall in price once again, it's clear where the market is headed and PC133 isn't it. Find out what the best buys are in...0 by Kiran Venkatesh on 4/1/2001
It's Price Guide time and what a time it is to purchase memory and motherboards. The prices of Socket-A motherboards and the rest of the boards in general...0 by Kiran Venkatesh on 3/2/2001