AMD's Hammer Architecture - Making Sense of it Allby Anand Lal Shimpi on October 23, 2001 2:57 AM EST
- Posted in
More than one way to skin a cat
It's easy to assume that AMD's next-generation CPU has to follow the same basic principles as Intel's NetBurst architecture:
1) very deep pipelining (20+ stages) to attain very high clock speeds (10GHz+ by 2006)
2) small, low latency caches and a very high bandwidth memory subsystem (e.g. RDRAM)
However it would make little sense for AMD to completely depart from their K7 architecture in order to make their future CPUs more P4-like. At the same time, AMD doesn't necessarily want to deal with the issues of extremely high clocked processors. As we talked about in our recent article on Intel's BBUL technology, as CPU clock speeds increase the packaging (what connects the silicon to the "outside world") becomes increasingly more important. Having just recently switched to non-ceramic packaging, a move Intel made in the late days of the original Pentium processor, it is unlikely that AMD would be able to develop the technology necessary to allow for their own 10 - 20GHz processors in the immediate future. Even Intel's Bumpless Buildup Layer packaging is a few years away and their packaging R&D teams significantly dwarf those at AMD. The bottom line is that from an engineering perspective, AMD can't go down the route of extremely high clock speeds as there are many areas outside of a CPU core that govern how high of a clock speed you can attain. What AMD lacks is the additional infrastructure necessary to follow the path of the Pentium 4.
This isn't necessarily a bad thing; look at some of the most powerful processors on the market today. In SPEC CFP2000 the Alpha 21264A running at 667MHz can outperform our beloved AMD Athlon at over 2x the clock speed, not to mention that Intel's own Itanium only runs at 800MHz while providing even higher scores. There is this clearly incorrect but popular feeling that when Intel designed the Pentium 4, a bunch of marketing gurus decided to create a processor that would only run at enormously high clock speeds. Intel understands just as much as AMD and the rest of the microprocessor manufacturers out there that there is more to performance game than just clock speed. AMD chooses to hype the number of instructions they can process in a single clock (IPC) since that's what their current processors excel at while Intel chooses to hype the clock speed they can attain for obvious reasons. Both IPC and clock speed are a part of the performance equation, meaning that you could theoretically design a processor to sustain a high IPC or a high clock speed.
Like the K7 architecture, AMD's Hammer is not designed around extremely high clock speeds but rather increasing IPC with a moderate boost in clock speed as well. This is far from the approach that Intel is taking with NetBurst and the Pentium 4 which doesn't make it right or wrong, just different.