Intel Celeron 800: The first 100MHz FSB Celeron

The Chip

The Celeron 800 remains unchanged from the previous Celeron processors.  It is still manufactured by disabling half of the cache on low-yield Pentium IIIs that have bad cache blocks, thus giving the Celeron half the cache as well as making that cache half as associative as the Pentium III’s cache.  This ends up hurting the Celeron severely as it, clock for clock, is unable to outperform the Pentium III, even when both are clocked at the same FSB/memory clock. 

The explanation for this is simple, the less associative a processor’s cache is, the lower hit-rate it has, and the lower the hit rate, the more times the CPU has to go to main memory to fetch needed information.  For more information on cache mapping techniques, check out our one page guide here.  

Celeron 800 Specifications

·        0.18-micron Coppermine128 core

·        800MHz clock speed – 8.0x clock multiplier

·        32KB on-die L1 cache running at core speed

·        256-bit Advanced Transfer Cache – 4-way set associative 128KB on-die L2 cache running at core speed

·        Advanced System Buffering

·        370-pin FC-PGA Socket-370 GTL+ CPU interface running at 66MHz

·        1.70v core voltage