Tyan Trinity 400 S1854

The Tyan Trinity 400 has been out for the longest, and although it has been available for sale for quite some time, until January 5, 2000 users had been forced to run their Trinity 400 with a beta revision of the BIOS.  The final revision 1.00 BIOS just came out on the 5th and has solved quite a few problems that were present with the previous 0.93 and older BIOS revisions. 

The Trinity 400 itself features both Socket-370 and Slot-1 interfaces, with only one of the two capable of being occupied at any given time.  A problem that does exist with the Trinity 400 is that when using the FC-PGA Pentium III, there is no way to force the board to detect the CPU as a 133MHz FSB CPU (since there is no way to change the pin state on the CPU itself, i.e. no jumpers on a socketed CPU) so the AGP divider is always set to 2/3. 

Unfortunately, because of this problem, we were unable to boot the Trinity 400 at anything above 124MHz with the FC-PGA in the socket.  This renders the Socket-370 virtually useless for the purpose at hand, but since a Socket-370 to Slot-1 adapter can be used in the Slot-1 interface on the Trinity 400, this problem can be avoided.  It would have been nice if Tyan had included jumper settings to force the detection of any CPU used as a 66/100/133MHz FSB CPU, but we’ll just have to make do with the FC-PGA + Socket-370 to Slot-1 adapter combination. 

The latest revision of the Trinity 400’s BIOS (1.00) does add some interesting options to the Chipset configuration such as AGP Driving Control  and CPU IOQ Size.  The AGP Driving Control setting allows for a number of possible settings to be inputted in as hex values, but, from our experience, it’s best to just leave this setting on Auto.  The next setting is even more obscure than the AGP Driving Control, which is CPU IOQ Size.  The setting has two options, 1 level and 4 level, and although we originally thought this setting would have no affect on performance, it turns out that the default setting of 1 level results in up to a 15% drop in performance when compared to running with the value set to 4 level.  We honestly can’t say what this setting controls, but in the end, setting it to 4 level resulted in faster performance with no noticeable sacrifices, so be sure to keep it at level 4 if you can. 

The last problem we had with the Trinity 400 was that, upon enabling AGP 4X on the board, it would cause 3D applications and games to lock up with a TNT2 and it would result in visual artifacts when used with a GeForce.  However, due to the lack of a performance improvement, we had no problem disabling AGP 4X because, in the end, as a result of that mysterious CPU IOQ Size setting, the performance of the Trinity 400 was noticeably greater (even while running in AGP 2X mode) than either of the other two boards which ran in AGP 4X mode. 

From a features standpoint, the Trinity 400 makes use of the Mobile South Bridge which is the 596B chip from VIA.  The other option would be the 686A which adds integrated hardware monitoring, support for an AMR slot (which is useful for system integrators but useless to the rest of us), and support for four USB ports.  Because the Trinity 400 uses the cheaper 596B chip, we only see two USB ports on the board. 

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