AMD Athlon

by Anand Lal Shimpi on August 9, 1999 7:37 PM EST

Athlon's Architecture

As briefly mentioned before, the Athlon is the first 7th generation x86 processor to hit the streets according to AMD. The key to the Athlon's success is the ability to do more at the same time than any currently available Intel processor. The language of x86 can be defined as the x86 instruction set, however each x86 processor has a different way of interpreting this universal language, sort of like how different dialects can interpret similar words differently.

AMD Athlon Block Diagram (Click to Enlarge)

blockdiag.gif (29783 bytes)

The P6 core, which is the base of the Pentium III albeit originally introduced in 1996 with the Pentium Pro, takes the instructions it receives and decodes them into (sometimes) smaller operations. The theory behind this is that it is much easier to tackle a problem if it is split up into multiple smaller parts. Why? Because unlike the conventional thinking we are used to, processors are capable of completing multiple tasks simultaneously, which is the key to their success.

Both the Athlon and P6 (Pentium III) core are capable of decoding three instructions simultaneously, however in the case of the P6, the decoders cannot accept 3 complex instructions and process them simultaneously. In the case of the Athlon, regardless of the nature of the instructions, the decoding units are capable of decoding three instructions, regardless of nature, simultaneously. decoders.gif (1629 bytes)

Another point of improvement the Athlon offers over Intel's P6 core (yes, you read that right, AMD is not only going for competitive performance but they are looking to surpass Intel) is the accuracy of the processor's branch tree prediction. We've all met individuals that are undoubtedly predictable in life, whether it's because of something they always say or do, our minds get used to expecting a certain type of behavior from them when placed in a specific set of circumstances. The same applies to the Athlon, whose 2048-entry branch prediction table takes on the task of storing commonly used operations and attempts to predict what the next operation to come down the pipeline will be. Not only is the table 4 times as large as Intel's branch prediction table, but in the event that the Athlon incorrectly "guesses" at what the next operation will be, the penalty isn't as great as that of the P6 core. This is simply because of the Athlon's shorter pipelines (10-stage integer and 15-stage FP pipelines vs 15-stage integer and ~30-stage FP pipelines for the P6 core) which make sure that the Athlon doesn't have to start from scratch after a missed prediction.

The original debates (the politically correct way of saying flame wars) over the topic of AMD's FPU that occurred in newsgroups and online forums everywhere criticized both AMD and Cyrix FPUs for being poor performers in comparison to Intel. At the time, the most commonly used buzzword when backing that statement up was that Intel had a fully pipelined FPU and the rest didn't. fpu.gif (4145 bytes)

The argument no longer stands for AMD, as the Athlon's low latency FPU is now fully pipelined and is thus a definite competitor to Intel in terms of raw FPU performance. Athlon users won't have to worry about whether or not a game is 3DNow! optimized to get the most performance out of it.

Point-to-Point bus protocols Enhanced 3DNow!
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  • vortmax - Wednesday, September 6, 2006 - link

    Go AMD! Reply
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