AMD Athlon

by Anand Lal Shimpi on August 9, 1999 7:37 PM EST
EV6 offers a point-to-point connection for multiprocessor systems, meaning that each processor added to the equation gets its own 200MHz or 1.6GB/s of bandwidth to the chipset. Theoretically, this takes a huge chunk of the diminishing returns away from adding multiple processors to a system based on the EV6 bus, and obviously, the Athlon does support multiprocessor operation.

Digital/AMD's EV6 Point-to-Point Bus (right)

point2pointev6.gif (3255 bytes)

With the FSB operating at 100MHz x 2, the memory bus operates at 100MHz, however in the future DDR (Double Data Rate) SDRAM may become the solution that is paired with EV6 as an alternative to Rambus.

A block diagram of dual Athlon processors and the EV6 bus.

point2point.gif (24190 bytes)

The EV6 bus protocol is scalable from 200MHz to 400MHz (100MHz x 2 - 200MHz x 2), with the next logical step being the 266MHz (133MHz x 2) FSB frequency. At 266MHz the EV6 bus provides 2.13GB/s of bandwidth, and at 400MHz the bus offers a whopping 3.2GB/s of bandwidth. The key to EV6's success isn't the high operating frequency, but the expandability and flexibility it offers as a solution. GTL+ is easily saturated, and EV6 is the answer.

EV6 & Athlon's busses Athlon's Architecture
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  • vortmax - Wednesday, September 6, 2006 - link

    Go AMD! Reply
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