It’s got roughly one billion 32nm transistors, fabbed at Globalfoundries. Four CPU cores and a single graphics core. It’s what AMD calls an Accelerated Processing Unit (APU). And we’ll see it in 2011.

Unfortunately that’s a bit late. The APU, codenamed Llano, was originally scheduled for 2010 but got pushed back. In 2009/2010 Intel will be the first to deliver on-chip graphics with Clarkdale/Arrandale, and in late 2010 Sandy Bridge will have on-die graphics.

The first die shot of AMD's 32nm Llano APU based on 32nm Phenom II cores

Above is what I believe to be a die shot of AMD’s first APU. The CPU doesn’t use AMD’s next-generation microarchitecture, that’s only for the server and high end in 2011. The first APU will use the existing Phenom II architecture on the same die as DX11 graphics, but at 32nm. Sandy Bridge will use a brand new microprocessor architecture on 32nm but with updated Intel integrated graphics. It looks like Sandy Bridge will have the CPU advantage while Llano might have the GPU advantage, assuming Intel can't get their GPU act together by then. Llano is on schedule to debut in 2011 with OEM sampling happening before the end of the year.

Also on schedule is AMD’s next-generation microarchitecture, codenamed Bulldozer. AMD listed its client PC goals for 2010 at this year’s Financial Analyst Day, one of them is to start sampling its next-generation microprocessor next year - in 2010. If the chip is ready for OEMs by the end of 2010, that means it’ll go on sale as early as 1H 2011.

Unfortunately AMD isn’t talking much about Bulldozer architecture, I suspect we won’t see that disclosure until mid to late 2010. It’s not to keep things secret, we already have many estimates of what Bulldozer’s architecture is going to look like. And if the public already knows, then Intel is also well aware of what AMD has coming in 2011. Updated: AMD has given a high level overview of its Bulldozer and Bobcat architectures here

A major focus is going to be improving on one of AMD’s biggest weaknesses today: heavily threaded performance. Intel addresses it with Hyper Threading, AMD is throwing a bit more hardware at the problem. The dual integer clusters you may have heard of are the route AMD is taking...

AMD's 2010 - 2011 Desktop Roadmap
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  • pullmyfoot - Saturday, November 14, 2009 - link

    Finally. Im tired of Intel dominance. I havent seen seomthing really exciting from AMD like this in a long time. All the AMD stuff for the last three years have looked skimpy at best. But they really have a lot of stuff coming out. Not only that but it really looks like its going to be competitive this time. Late or not its better than nothing. Better than what theyve been coming out with for the past few years anyways (like that original Phenom bs). Happy to see that they are catching up pretty fast.

    Im an AMD fan, but I do admit, its true that AMD is really late. I wouldnt go as far as labling this Intel propaganda....

    I wonder what will change now that AMD has an extra $1.25 billion in their pockets. All this would have been in development for a long time and so that cash would have had no effect on it. However perhaps they might take a few more risks now that they have a billion of buffer with possibly more rewarding results.
  • Zool - Saturday, November 14, 2009 - link

    The GPU will be limited by the memory bandwith anyway until they dont come with a on die framebuffer and higher bandwith cpu memory. I think the main advantage will be the + paralel fp compute power if they can take advantage of the openCL or directcompute.
  • Zool - Saturday, November 14, 2009 - link

    I also want to note that a combined CPU/GPU code that heawyly depend on each other (for example a complex game engine where AI,physics and colision detection would depend on each other and interact) would run several times faster with merged GPU/CPU (with shared higher level caches and same ram pool) than with a stand alone GPU and a CPU(it would crawl on a stand alone gpu and cpu actualy). With GPU comunicating trough pcie buss and with its own memmory the latencies would kill this kind of tasks. Its actualy one of the reasons why nvidias physX just act as a added layer with minimum game code interaction.
    The amd-s fusion is actualy a giant leap in this direction (to a real monolithic cpu/gpu). Nvidia doesnt have cpu-s and intel doesnt have a gpu (i doesnt count the GMA series).
    There is still one thing thats need to be solved and thats the memory bandwith. With shared memory and the need for the gpu to acts as a real gpu the next generation fusion chips will need ram bandwith
    over 100 GB/s (actualy that wouldnt be bad for the cpu part either :)).
  • duploxxx - Thursday, November 12, 2009 - link

    Final Words
    Unfortunately for AMD, 2010 isn’t really interesting. The company will have to rely on aggressive pricing and the continued success of its graphics teams to carry it for the next 12 - 18 months.

    those are your final words? Indeed there are no new architectures popping-up in 2010 but for the rest I think AMD is really focusing on execution which is very important against mighty INTEL. The laptop refresh is really needed for good competition and what about c32/g34 not important enough, it will close the gab quite a bit on the server platform. Perhaps ask Johan if he doesn´t see this as a big thing happening in the server world, it paves the path to next generation of AMD.
  • Carleh - Thursday, November 12, 2009 - link

    Victoria falls are on the Zambezi river, wondering what a waterfall has to do with microarchitecture, if anything.
  • strikeback03 - Thursday, November 12, 2009 - link

    How about Nile, Geneva, Huron, Ontario, Conesus...

    All other bodies of water of varying levels of importance.
  • TETRONG - Thursday, November 12, 2009 - link

    Funny, I worked at a semicon company here in Calif. There was this crazy engineer who wouldn't shut up about Zambezi. Every spare moment he would be working on it, swearing that AMD was going to want the specs right away. Everyone would scream "Stop working on Zambezi!" Do something useful.

    This was three years ago. Talk about execution.
  • grimpr - Thursday, November 12, 2009 - link

    Yes, he also forgot to mention that the GPU Core of Llano 1st gen Fusion APU will be leveraged by DirectX11 DirectCompute and OpenCL in constrast to Intels crap IGP GMA successor in Sandy Bridge.

    A perfect candidate for Laptops and low priced mainstream desktops. Beefy desktops will reside with Bulldozer 8 cores / 16 threads and ATI's next gen 32nm discreet GPU at probably 8 Teraflops on the X2 Parts considering that Hemlock X2 has 5 Teraflops of Floating Point Power.

    Take care.

  • gost80 - Thursday, November 12, 2009 - link

    Wait, wait, wait, wait,... 1 billion?

    Lets do the math...

    GPU transistors = 1B - ~750M (Phenom II X4) = ~<300M

    That is only a bit more than a 4550 (~250M). So what I am hearing is, the next-gen, not-yet-released, coming-in-2-years, the-bees-knees, 32nm APU chip has a GPU is about as fast as the lowest end 55nm card you can find?

    Wow, I am so impressed... NOT!

    I guess this one is just IGP replacement for fusion platform. And if my guess is right, should take about 150 mm^2. Making the price around 80-150, depending on competing intel stuff.

    Context: I own AMD stock.
  • qcmadness - Thursday, November 12, 2009 - link

    Propus (AthlonII x4): 300M transistor (with 2 x 64-bit DDR-2 / DDR-3 MC)
    RV730 (320SP HD46x0): 514M transistor (with 128-bit DDR-2 / (G)DDR-3 MC)

    But I do agree with your 150mm^2 assumption.
    (300M x 0.25 + 700M x 0.125) = ~ 160mm^2

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