An Update on Turion

We also managed to corner some AMD folks about their new "mobile technology", the Turion 64. Here's what we were able to get out of them:

Much as we suspected, all of the power optimizations that went "into" Turion 64 are all transistor level optimizations.  Basically, selecting transistors that provide better thermal and power characteristics at the expense of lower switching frequencies.  Given that the Turion 64 runs at multiple speed grades lower than the fastest desktop Athlon 64s, this trade-off makes sense, but it also means that Turion 64 is no Pentium M killer.  There was one logic level optimization that went into Turion 64 and that was the support of a deeper C3 sleep state, but other than that, the Turion 64 is architecturally identical to a Socket-754 Athlon 64. 

The similarity between mobile and desktop goes one step further as we just confirmed that the packaging of the Turion 64 is no different than the Socket-754 desktop Athlon 64, except for the fact that the heatspreader is removed.  AMD did mention that they are looking at different packaging options that would surface in the second revision of the Turion 64 microprocessor. 

The Turion 64 notebooks that are going to be released will all be in the 1" - 1.4" thickness range, and weigh around 5 to 6.5 lbs.  The Turion is specifically targeted at what AMD is referring to as the mainstream thin and light segment, which also means that AMD will continue to remain non-competitive in the smaller form factor notebooks in which Centrino is available. 

AMD did mention that there is "focus" on a new mobile platform architecture, presumably similar in approach to the Centrino platform, designed from the ground up to be specifically for mobile applications rather than just down-scaling desktop technologies.  AMD was extremely quiet about details on this front other than the fact that it was something that their new Japan engineering lab is playing a key role in defining.  Whenever this new architecture does surface, it will carry the Turion brand.

Final Words

From talking to people like Justin Rattner and Fred Weber, the future of the CPU industry is looking to be particularly bright.  For the first time in recent history, we have both AMD and Intel agreeing on major points of future microprocessor architectures, and to AMD's credit, it looks like a lot of the decisions they made with the Athlon 64 were, in fact, the right ones.  What can we expect from AMD going forward?

We can expect the K8 execution core to remain relatively unchanged. Its successor may be deeper pipelined, but for the most part, the core itself appears to be mostly done evolving. 

We can expect future AMD chips, beyond 65nm, to be large groupings of cores, but the focus will continue to be on making them all general purpose, however with varying individual strengths (symmetric and heterogeneous). 

The Cell approach appears to be one supported by both AMD and Intel, but also appears to be too early in both their eyes.  It's clear that giving up Weber's symmetric heterogeneous approach isn't a sacrifice that either AMD or Intel are willing to make; they both appear to be waiting for smaller manufacturing processes to approach architectures similar in nature to Cell without sacrificing present day performance or hardware transparency. 

We also asked Weber about his thoughts on wafer and die stacking; he sounded particularly interested in them, but added that for a microprocessor, it's far too early to count on die stacking because of yield concerns.  He said that the time for the technology to be used on microprocessors would only exist once there's mass market use of it in memory manufacturing. Then, and only then, would it be mature enough to migrate to microprocessors. 

The K8 is here to stay


View All Comments

  • ceefka - Sunday, April 3, 2005 - link

    I assume this wafer and die stacking will also be used for increasing the GB's per RAM-stick. What else when 64-bit OSs and apps have become the standard? Is there any word from memory manufacturers on that? Reply
  • Athlex - Saturday, April 2, 2005 - link

    AMD seems to be missing the point of pitting Turion against Centrino. Intel's Centrino package requires a P-M, Intel chipset, and Intel wireless. Since most people don't know the diff between P-M and Centrino it's a brilliant way for Intel to move more silicon.

    Also confusing why AMD is using the same packaging for Turion CPUs as they do for normal A64 CPUs. The lowest-power XP-Ms use the smaller socket 563 (Sharp and Averatec systems for example). AMD already has a spec for a smaller 'socket 638' A64, seems like that should be the thin and light version.. C'mon AMD, let's see a real thin and light K8 notebook!
  • suryad - Friday, April 1, 2005 - link

    I agree...I cant wait for a dual core FX proc with each core clocked @ 3 GHz...think what a monster system that would be...yikes!! Reply
  • ceefka - Friday, April 1, 2005 - link

    #23 What exactly is ILP/TLP ?

    ILP Instruction Level Parallism
    TLP Thread Level Parallism

    It is explained in one of the CPU articles here on AT.

    Happy surfing.
  • BlvdKing - Friday, April 1, 2005 - link

    #26 - I would be torn between an IBM notebook and Turion too. IBM notebooks are amazing - full of features and so durable. Reply
  • cryptonomicon - Thursday, March 31, 2005 - link

    incredibly interesting article by anand.

    it seems like this is the kind of stuff you can only find at anantech.. the info is so in depth right from the source.
  • Regs - Thursday, March 31, 2005 - link

    Thank's Anand. With all this Intel news running about, it's good to see AMD isn't just planning to be a bench warmer. Reply
  • Xunilla - Thursday, March 31, 2005 - link

    #25 -- I agree, that is making a generalization that doesn't necessarily apply across the board. Reply
  • Xunilla - Thursday, March 31, 2005 - link

  • phaxmohdem - Thursday, March 31, 2005 - link

    I really want to see what kind of Turion notebooks spring forth. It will take a lot though to change my decision on the IBM T42 as my next notebook though. Reply

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