The Crucial MX500 500GB SSD Review: A Second Look
by Billy Tallis on February 2, 2018 9:30 AM ESTAnandTech Storage Bench - Light
Our Light storage test has relatively more sequential accesses and lower queue depths than The Destroyer or the Heavy test, and it's by far the shortest test overall. It's based largely on applications that aren't highly dependent on storage performance, so this is a test more of application launch times and file load times. This test can be seen as the sum of all the little delays in daily usage, but with the idle times trimmed to 25ms it takes less than half an hour to run. Details of the Light test can be found here. As with the ATSB Heavy test, this test is run with the drive both freshly erased and empty, and after filling the drive with sequential writes.
Most drives show a larger difference between full drive and empty drive performance on this Light test than on the Heavy test. Like the MX300, the Crucial MX500 continues to show a more pronounced full-drive performance hit than most of its competition. This effect has been reduced so that the MX500 is faster than all the earlier Crucial drives whether the test is run on an empty drive or full drive. Peak empty-drive performance hasn't improved much, so Crucial hasn't caught up to Samsung.
The Crucial MX500's average and 99th percentile latency scores when the Light test is run on a full drive show a bit more performance drop than most of its competition, but it is not a big outlier the way the MX300 was.
The full-drive average read and write latencies for the Crucial MX500 are a bit higher than what Samsung's drives deliver, but overall the MX500's latency is pretty good.
The Crucial MX300's 99th percentile read and write latencies were both significant outliers among mainstream SATA drives, while the MX500 blends in with more or less the same quality of service level as the competition.
As with the other ATSB tests, the Crucial MX500 draws more power than the MX300, but this time it remains one of the most efficient mainstream SATA SSDs, albeit with a small lead.
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PeachNCream - Friday, February 2, 2018 - link
"..the per-die capacity of the MX500's 64-layer 3D TLC is actually lower than that of the 32L 3D TLC.."Why is that the case? Shouldn't doubling the number of layers lead to greater capacity and does this mean that there are more ICs per GB in the newer MX500? I'm super confused.
jtd871 - Friday, February 2, 2018 - link
"The Crucial MX500 uses Micron's 256Gb 64L 3D TLC part and consequently returns to the standard drive capacities and overprovisioning ratios, instead of the unusual configurations caused by the 384Gb die capacity in the MX300's 32L 3D TLC. The slightly lower usable capacities of the MX500 than the MX300 means the new drives have slightly higher prices on a per-GB basis, but the MSRPs are still very competitive against current street prices for the competition."So the new chips have more layers per package, but less overall capacity. I'll guess the 384Gb die hamstrung performance on relatively smaller-capacity drives by offering fewer memory channels for the processor to work with simultaneously. Plus, I'll guess that it was a bit of an oddball size for the algorithms to deal with.
FunBunny2 - Friday, February 2, 2018 - link
large node?more area dedicated to control functions?
Billy Tallis - Friday, February 2, 2018 - link
For the 32L node, IMFT was more or less prioritizing MLC use cases by making a 256Gb MLC die that could be used as a 384Gb TLC part. For the 64L node, TLC is the priority and they're making both 256Gb TLC and 512Gb TLC parts. The latter should be cheaper per GB when it is available, but would be a worse choice for small consumer drives. The 256Gb die is really tiny, which makes it more appealing to the mobile market than a lot of previous IMFT parts.FunBunny2 - Saturday, February 3, 2018 - link
"making a 256Gb MLC die that could be used as a 384Gb TLC part."so... does this mean that NAND is all the same, and it's the controller that decides among S/M/T?? or is it the case that S can be coerced to M, and M to T, but not the other way round? is there a tute, here or elsewhere, that tells us the nittygritty about why titular NAND can/can't be used at other densities?
FunBunny2 - Saturday, February 3, 2018 - link
well, I did find one, but from 2012 (and AT: https://www.anandtech.com/show/5067/understanding-... )"This array can be turned into either SLC, MLC, or TLC. The actual array and transistors are equivalent in all three flash types; there is no physical difference. "
some/many folks have been claiming that TLC, in particular, is physically different from SLC. is that now true?
Kristian Vättö - Sunday, February 4, 2018 - link
In terms of memory cell design, SLC, MLC and TLC can be the same, but the peripheral circuit design isn't (min # of latches = # of bits per cell). More bits per cell designs are also likely to have more spare/ECC bytes per page.In layman terms, TLC and MLC can be run as pseudo-SLC by only programming the lower page, but it's impossible to run e.g. MLC as TLC. But pseudo-SLC isn't the same thing as native SLC.
Spatty - Wednesday, February 14, 2018 - link
SLC/MLC chips are physically the same chips during the fab process. Maybe some Implant changes but die layout is the same. In Probe, circuits are blown to make them SLC or MLC.The referenced quote in this thread, is that a due to the usage of die vs chip/package. The chips in the images can have multiple die in one single chip/package and thus the 'density' of the chip/package changes. More layers still means more bits/mm^2.
PeachNCream - Monday, February 5, 2018 - link
Thanks Billy! It makes more sense now.colonelclaw - Friday, February 2, 2018 - link
I'm wondering, would it be worth adding a PS4 Pro/'BoneX benchmark to SATA SSD reviews? The 1TB is fast becoming a worthwhile, if luxurious, upgrade for the top consoles. It may be slightly unaffordable now, but possibly not for long?