The AMD Zen and Ryzen 7 Review: A Deep Dive on 1800X, 1700X and 1700
by Ian Cutress on March 2, 2017 9:00 AM ESTThoughts and Comparisons
Throughout AMD's road to releasing details on Zen, we have had a chance to examine the information on the microarchitecture often earlier than we had expected to each point in the Zen design/launch cycle. Part of this is due to the fact that internally, AMD is very proud of their design, but some extra details (such as the extent of XFR, or the size of the micro-op cache), AMD has held close to its chest until the actual launch. With the data we have at hand, we can fill out a lot of information for a direct comparison chart to AMD’s last product and Intel’s current offerings.
| CPU uArch Comparison | ||||
| AMD | Intel | |||
| Zen 8C/16T 2017 |
Bulldozer 4M / 8T 2010 |
Skylake Kaby Lake 4C / 8T 2015/7 |
Broadwell 8C / 16T 2014 |
|
| L1-I Size | 64KB/core | 64KB/module | 32KB/core | 32KB/core |
| L1-I Assoc | 4-way | 2-way | 8-way | 8-way |
| L1-D Size | 32KB/core | 16KB/thread | 32KB/core | 32KB/core |
| L1-D Assoc | 8-way | 4-way | 8-way | 8-way |
| L2 Size | 512KB/core | 1MB/thread | 256KB/core | 256KB/core |
| L2 Assoc | 8-way | 16-way | 4-way | 8-way |
| L3 Size | 2MB/core | 1MB/thread | >2MB/cire | 1.5-3MB/core |
| L3 Assoc | 16-way | 64-way | 16-way | 16/20-way |
| L3 Type | Victim | Victim | Write-back | Write-back |
| L0 ITLB Entry | 8 | - | - | - |
| L0 ITLB Assoc | ? | - | - | - |
| L1 ITLB Entry | 64 | 72 | 128 | 128 |
| L1 ITLB Assoc | ? | Full | 8-way | 4-way |
| L2 ITLB Entry | 512 | 512 | 1536 | 1536 |
| L2 ITLB Assoc | ? | 4-way | 12-way | 4-way |
| L1 DTLB Entry | 64 | 32 | 64 | 64 |
| L1 DTLB Assoc | ? | Full | 4-way | 4-way |
| L2 DTLB Entry | 1536 | 1024 | - | - |
| L2 DTLB Assoc | ? | 8-way | - | - |
| Decode | 4 uops/cycle | 4 Mops/cycle | 5 uops/cycle | 4 uops/cycle |
| uOp Cache Size | 2048 | - | 1536 | 1536 |
| uOp Cache Assoc | ? | - | 8-way | 8-way |
| uOp Queue Size | ? | - | 128 | 64 |
| Dispatch / cycle | 6 uops/cycle | 4 Mops/cycle | 6 uops/cycle | 4 uops/cycle |
| INT Registers | 168 | 160 | 180 | 168 |
| FP Registers | 160 | 96 | 168 | 168 |
| Retire Queue | 192 | 128 | 224 | 192 |
| Retire Rate | 8/cycle | 4/cycle | 8/cycle | 4/cycle |
| Load Queue | 72 | 40 | 72 | 72 |
| Store Queue | 44 | 24 | 56 | 42 |
| ALU | 4 | 2 | 4 | 4 |
| AGU | 2 | 2 | 2+2 | 2+2 |
| FMAC | 2x128-bit | 2x128-bit 2x MMX 128-bit |
2x256-bit | 2x256-bit |
Bulldozer uses AMD-coined macro-ops, or Mops, which are internal fixed length instructions and can account for 3 smaller ops. These AMD Mops are different to Intel's 'macro-ops', which are variable length and different to Intel's 'micro-ops', which are simpler and fixed-length.
Excavator has a number of improvements over Bulldozer, such as a larger L1-D cache and a 768-entry L1 BTB size, however we were never given a full run-down of the core in a similar fashion and no high-end desktop version of Excavator will be made.
This isn’t an exhaustive list of all features (thanks to CPU World, Real World Tech and WikiChip for filling in some blanks) by any means, and doesn’t paint the whole story. For example, on the power side of the equation, AMD is stating that it has the ability to clock gate parts of the core and CCX that are not required to save power, and the L3 runs on its own clock domain shared across the cores. Or the latency to run certain operations, which is critical for workflow if a MUL operation takes 3, 4 or 5 cycles to complete. We have been told that the FPU load is two cycles quicker, which is something. The latency in the caches is also going to feature heavily in performance, and all we are told at this point is that L2 and L3 are lower latency than previous designs.
A number of these features we’ve already seen on Intel x86 CPUs, such as move elimination to reduce power, or the micro-op cache. The micro-op cache is a piece of the puzzle we wanted to know more about from day one, especially the rate at which we get cache hits for a given workload. Also, the use of new instructions will adjust a number of workloads that rely on them. Some users will lament the lack of true single-instruction AVX-2 support, however I suspect AMD would argue that the die area cost might be excessive at this time. That’s not to say AMD won’t support it in the future – we were told quite clearly that there were a number of features originally listed internally for Zen which didn’t make it, either due to time constraints or a lack of transistors.
We are told that AMD has a clear internal roadmap for CPU microarchitecture design over the next few generations. As long as we don’t stay for so long on 14nm similar to what we did at 28/32nm, with IO updates over the coming years, a competitive clock-for-clock product (even to Broadwell) with good efficiency will be a welcome return.
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Crono - Thursday, March 2, 2017 - link
A Hero Has RyzenSweeprshill - Thursday, March 2, 2017 - link
Lived up to the hype. Ryzen is a beast. Intel needs massive price cuts on their 2011-v3 chips. Well done AMD, best price/performance CPUs on the market and as fast or faster than Intel performance.sans - Thursday, March 2, 2017 - link
Hey, what you have found which features improving on AMD's crap has been found in Intel's products for years.Nem35 - Thursday, March 2, 2017 - link
Yeah, and it's beating the Intel. Funny, right?Sweeprshill - Thursday, March 2, 2017 - link
Yeah these new AMD chips are monsters. Wondering how large the price cuts are that Intel will bring to their 2011-v3 chips to compete.czerro - Friday, March 3, 2017 - link
Intel already slashed prices pretty drastically 4 days ago, to kinda deflate Ryzen's release. Before price cuts, Ryzen had a huge price and performance advantage at all metrics, and Intel would have looked ridiculous.I can't believe people aren't reporting the price-cutting right before Ryzen release more. Intel only did it to save face on graphs and confuse people. Ryzen definitely had Intel by the balls a week ago before the price cuts.
It's great that we all have options now, but this really smeared Ryzen's release in a cheap way that anybody can point out all those Intel chips were 100-200 dollars more expensive less than a WEEK ago.
SodaAnt - Saturday, March 4, 2017 - link
No, Intel hasn't slashed prices. There was a sale at microcenter a few days back, but there's no across the board official price cut on Intel chips.Notmyusualid - Monday, March 6, 2017 - link
@ SodaAntAgreed, I see no Intel price drops either.
Notmyusualid - Friday, March 3, 2017 - link
@ Nem35Incomplete review.
After seeing a gaming-focused review, I'd say the AMD procs are just OK. I welcome AMD is back with a fighting chance, but about half my purchase choice will be game-inspired.
Quote:
"For gaming, it’s a hard pass. We absolutely do not recommend the 1800X for gaming-focused users or builds, given i5-level performance at two times the price."
I'm not a 'fanboi', as I'd have no trouble fitting a 1700X in a build I wouldn't game in. But otherwise, like another reviewer said, its a hard pass.
Alexvrb - Saturday, March 4, 2017 - link
For gaming builds the upcoming Ryzen 5 and 3 series will offer a lot more bang for your buck and will compete much more aggressively. However, the Ryzen 7 still offers decent gaming performance and excellent performance everywhere else. The gobs of cores may come in handy in the future too, even in games - as more threads will be available on more rigs, devs will take notice. This year AMD is definitely lowering the pricing for 8-16 thread processors, clearing a path for the future of gaming.With that being said I still think that when strictly considering gaming, their Ryzen 3/5 quadcore models will be a far better value, especially as current-gen games aren't often built in such a way that they can take advantage of the Ryzen 7.