Inside the S822L: Hardware Components

The 2U Rack-mount S822L server contains two IBM POWER8 DCM sockets. Each socket thus contains two cores connected by a 32GBps interconnect. The reason for using a Multi-Chip-Module (MCM) is pretty simple. Smaller five-to-six core dies are a lot cheaper to produce than the massive 650 mm² monolithic 12-core dies. As a result the latter are reserved for IBM's high-end (E880 and a like). So while most POWER8 presentations and news posts on the net talk about the multi-core die below...

... it is actually an MCM with two six core dies like the one below that is challenging the 10 to 18 core Xeons. The massive monolithic 10-12 core dies are in fact reserved for much more expensive IBM servers.

The layout of the S822L is well illustrated by the scheme inside the manual.

Each DCM offers 48 PCIe Gen 3 lanes. 32 of those lanes are directly connected to the processor while 16 connect to PCIe switches. The PCIe switches have "only" 8 lanes upstream to the DCM, but offer 24 lanes to "medium" speed devices downstream. As it unlikely that both your SAS controllers and your network controllers will gobble up the full PCIe x8 bandwidth, this is a very elegant way to offer additional PCIe lanes.

Taking a Closer Look Inside IBM's S822L The L4-cache and Memory Subsystem
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  • joegee - Thursday, November 19, 2015 - link

    It was an awesome community. I learned so much from everyone. I remember the days when we'd write pages arguing whether AMD's new 64 bit extension to x86 was truly 64 bit. The discussions could be heated, but they were seldom rude. I wish there were something similar today. :/ Reply
  • Kevin G - Saturday, November 7, 2015 - link

    Aces brings back memories for me as well even though I mainly lurked there.

    A solid chunk of that group have moved over to RWT.
    Reply
  • joegee - Thursday, November 19, 2015 - link

    What is RWT? Reply
  • psychobriggsy - Friday, November 6, 2015 - link

    Get back to Aces Hardware you! Reply
  • JohanAnandtech - Saturday, November 7, 2015 - link

    Like Ryan said, I have been working 11 years at Anand. In other words, it is great working at Anandtech. AT is one of the few tech sites out there that still values deep analysis and allows the editors to take the time to delve deep. Reply
  • joegee - Friday, November 6, 2015 - link

    And still writing as well as you ever did! Keep up the good work, Johan! Reply
  • rrossi - Saturday, November 7, 2015 - link

    Dear Johan nice article. Did u ever consider sparse system solving (with preconditioning) as a sensitive benchmark? It is a crucial stage of most scientific applications and it is a bandwidth limited operation with a high degree of parallelism. It would be definitely interesting to see how the power 8 fares on such a test. If you are interested I think I could provide a pointer to a simple benchmark (to be compiled). If you feel it may be interesting just drop me an email. Reply
  • JohanAnandtech - Saturday, November 7, 2015 - link

    Interested... mail me, I don't have your mail. See the author link on top of the article. Reply
  • Ian Cutress - Saturday, November 7, 2015 - link

    I'd also like to be pointed to such a benchmark for workstation style tests on x86. Please email ian@anandtech.com with info :) Reply
  • MartinT - Friday, November 6, 2015 - link

    Johan's been with Anandtech for more than a decade, and has been publishing on the subject since the late 90s.

    But I very much second your "Niiiiice!," as reading his name always reminds me of the old days over at aceshardware, and I'm always looking forward to his insights!
    Reply

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