The Secret of Denver: Binary Translation & Code Optimization

As we alluded to earlier, NVIDIA’s decision to forgo a traditional out-of-order design for Denver means that much of Denver’s potential is contained in its software rather than its hardware. The underlying chip itself, though by no means simple, is at its core a very large in-order processor. So it falls to the software stack to make Denver sing.

Accomplishing this task is NVIDIA’s dynamic code optimizer (DCO). The purpose of the DCO is to accomplish two tasks: to translate ARM code to Denver’s native format, and to optimize this code to make it run better on Denver. With no out-of-order hardware on Denver, it is the DCO’s task to find instruction level parallelism within a thread to fill Denver’s many execution units, and to reorder instructions around potential stalls, something that is no simple task.

Starting first with the binary translation aspects of DCO, the binary translator is not used for all code. All code goes through the ARM decoder units at least once before, and only after Denver realizes it has run the same code segments enough times does that code get kicked to the translator. Running code translation and optimization is itself a software task, and as a result this task requires a certain amount of real time, CPU time, and power. This means that it only makes sense to send code out for translation and optimization if it’s recurring, even if taking the ARM decoder path fails to exploit much in the way of Denver’s capabilities.

This sets up some very clear best and worst case scenarios for Denver. In the best case scenario Denver is entirely running code that has already been through the DCO, meaning it’s being fed the best code possible and isn’t having to run suboptimal code from the ARM decoder or spending resources invoking the optimizer. On the other hand then, the worst case scenario for Denver is whenever code doesn’t recur. Non-recurring code means that the optimizer is never getting used because that code is never seen again, and invoking the DCO would be pointless as the benefits of optimizing the code are outweighed by the costs of that optimization.

Assuming that a code segment recurs enough to justify translation, it is then kicked over to the DCO to receive translation and optimization. Because this itself is a software process, the DCO is a critical component due to both the code it generates and the code it itself is built from. The DCO needs to be highly tuned so that Denver isn’t spending more resources than it needs to in order to run the DCO, and it needs to produce highly optimal code for Denver to ensure the chip achieves maximum performance. This becomes a very interesting balancing act for NVIDIA, as a longer examination of code segments could potentially produce even better code, but it would increase the costs of running the DCO.

In the optimization step NVIDIA undertakes a number of actions to improve code performance. This includes out-of-order optimizations such as instruction and load/store reordering, along register renaming. However the DCO also behaves as a traditional compiler would, undertaking actions such as unrolling loops and eliminating redundant/dead code that never gets executed. For NVIDIA this optimization step is the most critical aspect of Denver, as its performance will live and die by the DCO.


Denver's optimization cache: optimized code can call other optimized code for even better performance

Once code leaves the DCO, it is then stored for future use in an area NVIDIA calls the optimization cache. The cache is a 128MB segment of main memory reserved to hold these translated and optimized code segments for future reuse, with Denver banking on its ability to reuse code to achieve its peak performance. The presence of the optimization cache does mean that Denver suffers a slight memory capacity penalty compared to other SoCs, which in the case of the N9 means that 1/16th (6%) of the N9’s memory is reserved for the cache. Meanwhile, also resident here is the DCO code itself, which is shipped and stored as already-optimized code so that it can achieve its full performance right off the bat.

Overall the DCO ends up being interesting for a number of reasons, not the least of which are the tradeoffs are made by its inclusion. The DCO instruction window is larger than any comparable OoOE engine, meaning NVIDIA can look at larger code blocks than hardware OoOE reorder engines and potentially extract even better ILP and other optimizations from the code. On the other hand the DCO can only work on code in advance, denying it the ability to see and work on code in real-time as it’s executing like a hardware out-of-order implementation. In such cases, even with a smaller window to work with a hardware OoOE implementation could produce better results, particularly in avoiding memory stalls.

As Denver lives and dies by its optimizer, it puts NVIDIA in an interesting position once again owing to their GPU heritage. Much of the above is true for GPUs as well as it is Denver, and while it’s by no means a perfect overlap it does mean that NVIDIA comes into this with a great deal of experience in optimizing code for an in-order processor. NVIDIA faces a major uphill battle here – hardware OoOE has proven itself reliable time and time again, especially compared to projects banking on superior compilers – so having that compiler background is incredibly important for NVIDIA.

In the meantime because NVIDIA relies on a software optimizer, Denver’s code optimization routine itself has one last advantage over hardware: upgradability. NVIDIA retains the ability to upgrade the DCO itself, potentially deploying new versions of the DCO farther down the line if improvements are made. In principle a DCO upgrade not a feature you want to find yourself needing to use – ideally Denver’s optimizer would be perfect from the start – but it’s none the less a good feature to have for the imperfect real world.

Case in point, we have encountered a floating point bug in Denver that has been traced back to the DCO, which under exceptional workloads causes Denver to overflow an internal register and trigger an SoC reset. Though this bug doesn’t lead to reliability problems in real world usage, it’s exactly the kind of issue that makes DCO updates valuable for NVIDIA as it gives them an opportunity to fix the bug. However at the same time NVIDIA has yet to take advantage of this opportunity, and as of the latest version of Android for the Nexus 9 it seems that this issue still occurs. So it remains to be seen if BSP updates will include DCO updates to improve performance and remove such bugs.

Designing Denver SPECing Denver's Performance
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  • cjs150 - Wednesday, February 4, 2015 - link

    No microSD - no chance of me buying it.

    Tablets are designed to be portable so why do designers never consider the needs of people on the move who may not have access to the cloud (either at all or at prohibitive cost). With 128 mb MicroSD card I can store tons of music, movies, tv shows and watch when I like on holiday
  • Impulses - Wednesday, February 4, 2015 - link

    USB OTG ftw
  • R. Hunt - Thursday, February 5, 2015 - link

    Hardly the same thing though.
  • UtilityMax - Sunday, February 8, 2015 - link

    They want you to pay royalties to store your stuff in the cloud. I agree that 16GB is somewhat limiting. Half of that space will be used by the OS and applications, with barely anything left for user's data. I'd go with the 32GB model at the very least.
  • NotLupus - Wednesday, February 4, 2015 - link

    What's the date today?
  • smayonak - Wednesday, February 4, 2015 - link

    Ryan, I noticed that the Nexus 9 offers always-on (screen-off) Google Now activation. I checked in CPUSpy (and other apps) and noticed that even when all cores are parked, this feature works, suggesting that NVidia may have included a custom DSP or third core for audio processing. The +1 core in NVidia's Tegra platform was apparently transparent to the operating system, because it never showed up in CPU activity monitor apps.

    If it is a custom DSP used for natural language processing, this would probably run afoul of Qualcomm's lock on the IP. Which might explain why NVidia never announced a third core (or DSP) in the Denver platform.

    I'm not sure if it's just my imagination at work -- can you confirm or disprove (or speculate) on the existence of a third core? Supposedly Android 5.0 includes support for idle-state audio processing, but only if supported by the hardware. But it would seem hardware support would require some kind of low-energy state processing core. And nothing of the sort appears in NVidia's press releases.

    By the way, thank you for the amazingly detailed and insightful review. You guys are amazing.
  • Andrei Frumusanu - Wednesday, February 4, 2015 - link

    Always-on voice activation is done by the audio SoC and has no connection to the main SoC or any DSP. Qualcomm's voice activation is done via the audio chip.
  • smayonak - Wednesday, February 4, 2015 - link

    Thanks. I have no doubt that's true, but I can't track down a reference. Anandtech's own article on the subject refers to Motorola's implementation of idle-state audio processing as relying on the X8's low-power cores, dedicated to handling audio processing.

    Motorola's press release claimed that their X8 included proprietary "natural language" and "contextual" processing cores (which I thought were some kind of analog-to-digital audio-processing DSP, but may be wrong), which allowed for always-on activation of Google Now.

    I can count the number of devices that support screen-off Google Now on one hand. The relatively small number of devices with this feature is perplexing. Or maybe no one advertises it?
  • toyotabedzrock - Wednesday, February 4, 2015 - link

    While turning a GPU into a CPU is a great accomplishment then essentially built a CPU that seems designed to benchmark well but will stall endlessly on real world code.
  • Anonymous Blowhard - Wednesday, February 4, 2015 - link

    This article is soooo late, clearly you should have just thrown up a half-page blurb with a clickbait title and was shallow enough that it could have just been written hands-off from the tech specs.

    /s

    Great read as always. Good things are worth waiting for.

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