Late last year we did an installment of Ask the Experts with ARM's Peter Greenhalgh, lead architect for the Cortex A53. The whole thing went so well, in no small part to your awesome questions, that ARM is giving us direct access to a few more key folks over the coming months.

Krisztián Flautner is Vice President of Research and Development at ARM, and as you can guess - he's focused on not the near term, but what's coming down the road for ARM. ARM recently celebrated its 50 billionth CPU shipment via its partners, well Krisztián is more focused on the technologies that will drive the next 100 billion shipments.

Krisztián holds PhD, MSE and BSE degrees in computer science and engineering from the University of Michigan. He leads a global team that researches everything from circuits to processor/system architectures and even devices. And he's here to answer your questions.

If there's anything you want to ask the VP of R&D at ARM, this is your chance. Leave a comment with your question and Krisztián will go through and answer any he's able to answer. If you've got questions about process tech, Moore's Law, ARM's technology roadmap planning or pretty much anything about where ARM is going, ask away! 

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  • quadrivial - Wednesday, June 11, 2014 - link

    Apple Cyclone (A7) hard-launched in September of last year. ARM's A57 won't hard launch until the middle of next year (close to 18 months later).

    How does the first-party ARM design team fall so far behind when foreknowledge of the new ISA gives them a head start in micro-architecture design and implementation? What is ARM R&D doing to catch up with their licensees?
  • sverre_j - Wednesday, June 11, 2014 - link

    Back to the question about the new 64-bit ISA.
    I was surprised to leard that the ARMv8 instructions translate into microops. Was this done to cater for instructions that need to be broken up into pieces? Were there other reasons for doing so?
    Thanks.

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