NVIDIA Tegra 4 Architecture Deep Dive, Plus Tegra 4i, Icera i500 & Phoenix Hands On
by Anand Lal Shimpi & Brian Klug on February 24, 2013 3:00 PM ESTThe Cortex A9 r4p1
Although we just call ARM’s previous architecture by its Cortex A9 name, there have been multiple revisions to the A9 architecture since its introduction. Tegra 2 implemented Cortex A9 r1p1, while Tegra 3 used r2p9. With Tegra 4i, NVIDIA moved to the absolute latest version of the Cortex A9 core: r4p1.
There are some significant changes to the Cortex A9 in r4p1. The GHB, L2 TLB and BTAC all grew by 4x and are now sized equally between the A9 and A15 implementations (16K predictors, 512 entries and 4096 entries, respectively). These changes help improve branch prediction accuracy, which further increases IPC on an already very efficient design.
The A9 r4p1 also has an enhanced data prefetching engine, including a small L1 prefetcher and dedicated hardware for the cache preload instruction.
NVIDIA claims a 15% increase in SPECint_base for the Cortex A9 r4p1 vs. r2p9, which is pretty impressive. Combined with the 2.3GHz max frequency, Tegra 4i’s CPU performance should be a healthy improvement over what we have in Tegra 3 today.
Tegra 4 Clock Speeds
Each of the four primary Cortex A15s is driven off the same voltage and frequency plane, although each core can be power gated individually. This is similar to how Intel designs its processors, but at odds with Qualcomm’s independent voltage/frequency planes.
NVIDIA does a good job of binning its SoCs, and the same will continue with Tegra 4. All four cores are capable of running at up to 1.9GHz, although NVIDIA claims we may see configurations with even higher single core boost frequencies (or even lower max frequencies, similar to Tegra 3). As I already mentioned, the fifth Cortex A15 runs at somewhere between 700 and 800MHz.
The Tegra 4 GPU operates at up to 672MHz, up from the 520MHz max in Tegra 3.
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Death666Angel - Wednesday, February 27, 2013 - link
Get a life.StormyParis - Sunday, February 24, 2013 - link
I'd go with Anand, anytime. Charlie is a raving bitch.mayankleoboy1 - Sunday, February 24, 2013 - link
Except that this raving bitch has accurately predicted the future course of most companies months before anybody.Avalon - Monday, February 25, 2013 - link
If by accurate you mean he made many predictions for every company and when one of the predictions came true everyone forgot about all the wrong ones. He guesses.Kiste - Monday, February 25, 2013 - link
Confirmation bias ahoy!AmdInside - Monday, February 25, 2013 - link
Are you kidding me? Even congress lies less than Charlie does.jjj - Sunday, February 24, 2013 - link
I wouldn't expect a huge downclock for phones , they do need to limit heat, not going with POP for the RAM helps ,some actual cooling (air gap or metal) could also be used so they will most likely allow 1-2 cores to go pretty high and maybe all 4 for short periods of time (so the usual tricks to get more out of it).R3MF - Sunday, February 24, 2013 - link
re tegra 4 gpu architecture.how did you get through this many words without mentioning OpenCL?
lack of ES 3.0 is only half the problem.
cmikeh2 - Sunday, February 24, 2013 - link
He does reference it when discussing the Chimera ISP:"At the same time, the elephant in the room is OpenCL (and its current absence on Tegra 4) and what direction the industry will take that to leverage GPU compute for some computational photography processing."
guidryp - Sunday, February 24, 2013 - link
The Icera acquisition was a brilliant one. This gives NVidia the complete mobile package. It will be very interesting to see how this works out in practice. NVidia is a fierce competitor, Qualcomm should be worried.