Intel's Haswell Architecture Analyzed: Building a New PC and a New Intel
by Anand Lal Shimpi on October 5, 2012 2:45 AM ESTTSX
Johan did a great job explaining Haswell's Transactional Synchronization eXtensions (TSX), so I won't go into as much depth here. The basic premise is simple, although the implementation is quite complex.
It's easy to demand well threaded applications from software vendors, but actually implementing code that scales well across unlimited threads isn't easy. Parallelizing truly independent tasks is the low hanging fruit, but it's the tasks that all access the same data structure that can create problems. With multiple cores accessing the same data structure, running independent of one another, there's the risk of two different cores writing to the same part of the same structure. Only one set of data can be right, but dealing with this concurrent access problem can get hairy.
The simplest way to deal with it is simply to lock the entire data structure as soon as one core starts accessing it and only allow that one core write access until it's done. Other cores are given access to the data structure, but serially, not in parallel to avoid any data integrity issues.
This is by far the easiest way to deal with the problem of multiple threads accessing the same data structure, however it also prevents any performance scaling across multiple threads/cores. As focused as Intel is on increasing single threaded performance, a lot of die area goes wasted if applications don't scale well with more cores.
Software developers can instead choose to implement more fine grained locking of data structures, however doing so obviously increases the complexity of their code.
Haswell's TSX instructions allow the developer to shift much of the complexity of managing locks to the CPU. Using the new Hardware Lock Elision and its XAQUIRE/XRELEASE instructions, Haswell developers can mark a section of code for transactional execution. Haswell will then execute the code as if no hardware locks were in place and if it completes without issues the CPU will commit all writes to memory and enjoy the performance benefits. If two or more threads attempt to write to the same area in memory, the process is aborted and code re-executed traditionally with locks. The XAQUIRE/XRELEASE instructions decode to no-ops on earlier architectures so backwards compatibility isn't a problem.
Like most new instructions, it's going to take a while for Haswell's TSX to take off as we'll need to see significant adoption of Haswell platforms as well as developers embracing the new instructions. TSX does stand to show improvements in performance anywhere from client to server performance if implemented however, this is definitely one to watch for and be excited about.
Haswell also continues improvements in virtualization performance, including big decreases to guest/host transition times.
Facebook
Twitter
RSS
245 Comments
View All Comments
Magik_Breezy - Sunday, October 14, 2012 - link
Probably real customer support without paying an extra $200Spunjji - Thursday, October 18, 2012 - link
Yawn.Spunjji - Thursday, October 18, 2012 - link
The bit that aggravates me the most is that even with this lavishing of review pages, the actual comparison of Apple products to competitors tends to lack (particularly with the Macbook article). This is understandable under some circumstances (iPhone battery life - new test, small selection of data points) but not for others.Arbee - Friday, October 5, 2012 - link
I'm not really seeing any of that. AT's Android and Windows Phone reviews are just as in-depth and complementary where due as their Apple ones. AFAIK both Anand's and Brian's daily-driver phones aren't iPhones, even. They care about the tech, not who it comes from. It just happens that Apple is often the original source of new and interesting things in that space. At this exact moment they're the only people shipping something new and interesting. When the Nokia 920 launches, I'm confident Anand and Brian will be ready with a 15+ page review and discussion of anything novel on the podcast, and when Winter CES brings us Tegra 4 and other Android news, I expect to see eye-glazing levels of detail here at AT.(As an aside, I smiled at how closely DPReview's discussion of the alleged "purple haze" problem tracked Brian's rant on the podcast - clearly both writers know what they're talking about, which can be a rare quantity in tech journalism).
VivekGowri - Saturday, October 6, 2012 - link
I think Anand's daily driver is an iPhone, but he frequently carries the latest Android/WP device on the side. Brian and myself end up daily driving like a half dozen phones a month, depending on what shows up at our doorstep.Zink - Saturday, October 6, 2012 - link
"iPad 3 form factor" was used because all of the other tablets have 25Wh batteries and draw about 5W max. The A5X iPad and it's giant 42.5Wh battery on the other hand can put out over 10W of heat which is the power envelope where Intel might target a Haswell SOC.amdwilliam1985 - Monday, October 8, 2012 - link
I totally agree with you on the Apple part. That's the biggest pullback on reading Anand writings. Too much Apple praising.I used to be an Apple fan, but recently they're becoming the biggest jerks in the technology industry. The human/ethical part of in me hates them so much, that I won't buy anything that has a Apple logo on it.
I gave away my iPad 2, switched to Samsung Galaxy S phones, and using my HP windows 7 laptop over the 2011 MBA.
-say NO to bully, say NO to Apple.
xaml - Thursday, May 23, 2013 - link
Number of problems solved with this approach: NO.dartox - Tuesday, November 27, 2012 - link
Probably because most people know about how large an iPad is - if he said "tablet" form factor that's ambigious.. and if he said "Motorola XOOM" form factor not as many people are familiar with the size.Paer0 - Friday, October 5, 2012 - link
Yes... Macs are well engineered and deliver a solid performance across board.