Intel has once again re-energized the overclocking community with the recent release of the Core 2 Extreme QX9650 quad-core processor, the first of many new mobile, desktop, and server CPUs fabricated using their radically new 45nm process technology. Early results have highlighted Intel's extremely conservative approach in assigning processor power specifications and because of this, users looking to push their systems beyond rated speeds are finding they have a lot more headroom than normally expected. Our overclocking trials have met with great success, as exploiting this processor's hidden performance margin is easier than ever imagined.

The last seven generations of Intel processors have utilized traditional metal oxide semiconductor (MOS) materials, namely silicon dioxide (SiO2) and other polysilicates. This has spanned a period starting with the Pentium, originally built on 0.6 micron (600nm) node technology, all the way to Core 2 Duo/Quad parts built on 65nm. However, for the first time in over 40 years, Intel has significantly changed some of the basic components used in transistor fabrication. Hafnium dioxide (HfO2) has replaced SiO2 as the gate dielectric material, along with other carefully chosen new metals, for use in the formation of gate electrodes in both PMOS and NMOS transistors. These new materials, along with the right process recipe, have cut gate leakage by a factor of more than 10x while simultaneously delivering an astonishing 30% decrease in transistor switching energy. The result is a cooler running, more energy efficient, and high-performance processing powerhouse.

Intel's Core 2 Extreme QX9650 in the classic LGA775 package

Moving to a smaller node process technology allows for the potential of two things to happen. The first is the ability to make smaller production dies, reducing manufacturing costs, and ultimately making products more affordable to the consumer. Alternatively, designers can take advantage of the increased transistor density made possible by the new process and develop next-generation solutions that pack even more transistors into the same space as before. Smaller transistors also allow Intel to take advantage of lower switching energies up to a limit. This is true until smaller and smaller transistor gate dielectric boundary layers create conditions in which power leakage - even with the transistors in the "off" state - become excessive. From this point on something will have to change if Moore's "Law" is going to continue.

With much fanfare, Intel released the highly anticipated Core 2 Extreme QX9650 Processor just a few shorts weeks ago, knowing that the high price would be little more than a speed bump for high-performance enthusiasts. More practical-minded users will have to wait until early 2008 before experiencing the mainstream release. Naturally, we wasted no time in bringing you this first-hand look at the QX9650's expansive overclocking potential. Although our experience has not been entirely without problems - we will cover the good and bad later in more detail - we must commend Intel on the development of another great product. Without a doubt, the QX9650 has taken its rightful place in the winner's circle.

Our maximum overclock on water is nothing short of impressive

Until now, achieving this level of overclock with water-cooling alone was unheard of and we find ourselves feeling punch drunk with the speed. Indeed, finding applications that make practical use of this ridiculous amount of processing power is exceedingly difficult - few programs these days efficiently utilize two cores, let alone four. Obviously, scenarios that make intelligent use of the QX9650's exceptional parallel processing capabilities stand to benefit the most. Good examples are video (and to a lesser extent audio) editing, rendering, ray tracing, 3D modeling, DivX/Xvid encoding operations, and of course gaming (when properly coded and without GPU limitations).

We hope our in-depth look at QX9650 overclocking will provide new information even for those who have been into the overclocking scene for some time. Others, looking for the right opportunity to try their hand at voiding their processor's warranty, should find just about everything they need get started down the long path towards an overclocking addiction. Strap on your heatsinks, tweak your voltages, and join us as we see exactly what Penryn and 45nm brings to the overclocking party.

Will the Real QX9650 Power Consumption Please Stand Up?


View All Comments

  • Lifted - Wednesday, December 19, 2007 - link

    Very impressive. Seems more like a thesis paper than a typical tech site article. While the content on AT is of a higher quality than the rest of the sites out there, I think the other authors, founder included, could learn a thing or two from an article like this. Less commentary/controversy and more quality is the way to go. Reply
  • AssBall - Wednesday, December 19, 2007 - link

    Shouldn't page 3's title be "Exlporing the limits of 45nm Halfnium"? :D">
  • lifeguard1999 - Wednesday, December 19, 2007 - link

    "Do they worry more about the $5000-$10000 per month (or more) spent on the employee using a workstation, or the $10-$30 spent on the power for the workstation? The greater concern is often whether or not a given location has the capacity to power the workstations, not how much the power will cost."

    For High Performance Computers (HPC a.k.a. supercomputers) every little bit helps. We are not only concerned about the power from the CPU, but also the power from the little 5 Watt Ethernet port that goes unused, but consumes power. When you are talking about HPC systems, they now scale into the tens-of-thousands of CPUs. That 5 Watt Ethernet port is now a 50 KWatt problem just from the additional power required. That Problem now has to be cooled as well. More cooling requires more power. Now can your infrastructure handle the power and cooling load, or does it need to be upgraded?

    This is somewhat of a straw-man argument since most (but not all) HPC vendors know about the problem. Most HPC vendors do not include items on their systems that are not used. They know that if they want to stay in the race with their competitors that they have to meet or exceed performance benchmarks. Those performance benchmarks not only include how fast it can execute software, but also how much power and cooling and (can you guess it?) noise.

    In 2005, we started looking at what it would take to house our 2009 HPC system. In 2007, we started upgrades to be able to handle the power and cooling needed. The local power company loves us, even though they have to increase their power substation.

    Thought for the day:
    How many car batteries does it take to make a UPS for a HPC system with tens-of-thousands of CPUs?
  • CobraT1 - Wednesday, December 19, 2007 - link

    "Thought for the day:
    How many car batteries does it take to make a UPS for a HPC system with tens-of-thousands of CPUs?"


    Car batteries are not used in neither static nor rotary UPS's.
  • tronicson - Wednesday, December 19, 2007 - link

    this is a great article - very technical, will have to read it step by step to get it all ;-)

    but i have one question that remains for me.. how is it about electromigration with the very filigran 45nm structures? we have here new materials like the hafnium based high-k dielectricum, guess this may improove the resistance agains em... but how far may we really push this cpu until we risk very short life and destruction? intel gives a headroom until max 1.3625V .. well what can i risk to give with a good waterchill? how far can i go?

    i mean feeding a 45nm core p.ex. 1,5V is the same as giving a 65nm 1,6375! would you do that to your Q6600?
  • eilersr - Wednesday, December 19, 2007 - link

    Electromigration is an effect usually seen in the interconnect, not in the gate stack. It occurs when a wire (or material) has a high enough current density that the atoms actually move, leading to an open circuit, or in some cases, a short.

    To address your questions:
    1. The high-k dielectric in the gate stack has no effect on the resistance of the interconnect
    2. The finer features of wires on a 45nm process do have a lower threshold to electromigration effects, ie smaller wires have a lower current density they can tolerate before breaking.
    3. The effects of electromigration are fairly well understood at this point, there are all kinds of automated checks built in to the design tools before tapeout as well as very robust reliability tests performed on the chips prior to volume production to catch these types of reliability issues.
    4. The voltage a chip can tolerate is limited by a number of factors. Ignoring breakdown voltages and other effects limited by the physics of transistor operation, heat is where most OC'ers are concerned. As power dissipation is most crudely though of in terms of CVf^2 (capacitance times voltage times frequency-squared), the reduced capacitance in the gate due to the high-k dielectric does dramatically lower power power dissipation, and is well cited. The other main component in modern CPU's is the leakage, which again is helped by the high-k dielectric. So you should expect to be able to hit a bit higher voltage before hitting a thermal envelope limitation. However, the actual voltage it can tolerate is going to depend on the CPU and what corner of the process it came from. In all, there's no general guideline for what is "safe". Of course, anything over the recommended isn't "safe", but the only way you'll find out, unfortunately, is trial and error.
  • eilersr - Wednesday, December 19, 2007 - link

    Doh! Just noticed my own mistake:
    high-k dielectric does not reduce capacitance! Quite the contrary, a high-k dielectric will have higher capacitance if the thickness is kept constant. Don't know what I was thinking.

    Regardless, the capacitance of the gate stack is a factor, as the article mentioned. I don't know how the cap of Intel's 45nm gate compares with that of their 65nm gate, but I would venture it is lower:

    1. The area of the FET's is smaller, so less W*L parallel plate cap.
    2. The thickness of the dielectric was increased. Usually this decreases cap, but the addition of high-k counter acts that. Hard to say what balance was actually achieved.

    This is just a guess, only the process engineers no for sure :)
  • kjboughton - Wednesday, December 19, 2007 - link

    Asking how much voltage can be safetly applied to a (45nm) CPU is a lot like asking which story of a building can you jump from without the risk of breaking both legs on the landing. There's inherent risk in exceeding the manufacturer's specification at all and if you asked Intel what they thought I know exactly what they would say -- 1.3625V (or whatever the maximum rated VID value is). The fact of the matter is that choices like these can only be made by you. Personally, I feel exceeding about 1.4V with a quad 45nm CPU is a lot like beating your head against a wall, especially if your main concern is stability. My recommendation is that you stay below this value, assuming you have adequate cooling and can keep your core temperatures in check. Reply
  • renard01 - Wednesday, December 19, 2007 - link

    I just wanted to tell you that I am impressed by your article! Deep and practical at the same time.

    Go on like this.

    This is an impressive CPU!!

  • defter - Wednesday, December 19, 2007 - link

    People stop posting silly comments like: "Intel's TDP is below real power consumption, it isn't comparable to AMD's TDP".

    Here we have a 130W TDP CPU consuming 54W under load.

Log in

Don't have an account? Sign up now