An Update on Turion

We also managed to corner some AMD folks about their new "mobile technology", the Turion 64. Here's what we were able to get out of them:

Much as we suspected, all of the power optimizations that went "into" Turion 64 are all transistor level optimizations.  Basically, selecting transistors that provide better thermal and power characteristics at the expense of lower switching frequencies.  Given that the Turion 64 runs at multiple speed grades lower than the fastest desktop Athlon 64s, this trade-off makes sense, but it also means that Turion 64 is no Pentium M killer.  There was one logic level optimization that went into Turion 64 and that was the support of a deeper C3 sleep state, but other than that, the Turion 64 is architecturally identical to a Socket-754 Athlon 64. 

The similarity between mobile and desktop goes one step further as we just confirmed that the packaging of the Turion 64 is no different than the Socket-754 desktop Athlon 64, except for the fact that the heatspreader is removed.  AMD did mention that they are looking at different packaging options that would surface in the second revision of the Turion 64 microprocessor. 

The Turion 64 notebooks that are going to be released will all be in the 1" - 1.4" thickness range, and weigh around 5 to 6.5 lbs.  The Turion is specifically targeted at what AMD is referring to as the mainstream thin and light segment, which also means that AMD will continue to remain non-competitive in the smaller form factor notebooks in which Centrino is available. 

AMD did mention that there is "focus" on a new mobile platform architecture, presumably similar in approach to the Centrino platform, designed from the ground up to be specifically for mobile applications rather than just down-scaling desktop technologies.  AMD was extremely quiet about details on this front other than the fact that it was something that their new Japan engineering lab is playing a key role in defining.  Whenever this new architecture does surface, it will carry the Turion brand.

Final Words

From talking to people like Justin Rattner and Fred Weber, the future of the CPU industry is looking to be particularly bright.  For the first time in recent history, we have both AMD and Intel agreeing on major points of future microprocessor architectures, and to AMD's credit, it looks like a lot of the decisions they made with the Athlon 64 were, in fact, the right ones.  What can we expect from AMD going forward?

We can expect the K8 execution core to remain relatively unchanged. Its successor may be deeper pipelined, but for the most part, the core itself appears to be mostly done evolving. 

We can expect future AMD chips, beyond 65nm, to be large groupings of cores, but the focus will continue to be on making them all general purpose, however with varying individual strengths (symmetric and heterogeneous). 

The Cell approach appears to be one supported by both AMD and Intel, but also appears to be too early in both their eyes.  It's clear that giving up Weber's symmetric heterogeneous approach isn't a sacrifice that either AMD or Intel are willing to make; they both appear to be waiting for smaller manufacturing processes to approach architectures similar in nature to Cell without sacrificing present day performance or hardware transparency. 

We also asked Weber about his thoughts on wafer and die stacking; he sounded particularly interested in them, but added that for a microprocessor, it's far too early to count on die stacking because of yield concerns.  He said that the time for the technology to be used on microprocessors would only exist once there's mass market use of it in memory manufacturing. Then, and only then, would it be mature enough to migrate to microprocessors. 

The K8 is here to stay
POST A COMMENT

35 Comments

View All Comments

  • Filibuster - Thursday, March 31, 2005 - link

    ...but...its HYPER!

    #11 it can also decrease performance by 10-50% depending on the application. Clearly it matters what you're doing with your PC.

    http://www.digit-life.com/articles/pentium4xeonhyp...

    I think Fred is talking about the inconsistant gains/losses. Its not the best way to spend transistors.
    Reply
  • fitten - Thursday, March 31, 2005 - link

    #13, HT is kind of like hardware allowing context switching at instruction speed levels. Tyipcally, a thread that stalls on IO (like a hard drive) or something gets swapped out and another thread runs until the IO request completes. However, if a thread just can't use a cache well (streaming data, for example) all of those stalls due to memory loads just cause the CPU to sit and wait. These stalls are on the order of 10s of clock cycles. Other IO is on the order of 1000s of clock cycles (or more). A context switch is on the order of 100s of clock cycles. Obviously, you don't want to swap threads just because of a L2 cache miss. However, HT allows two thread contexts to be loaded so that when one thread stalls on a L2 cache miss, for example, the other thread can execute instructions with no delay. It's like shuffling cards. Basically, it allows the CPU to execute two contexts on the granularity of a clock cycle or two rather than on 100s of clock cycles.

    So, as an example, the worst case for a thread is that every piece of data it wants will generate an L2 cache miss. On a non-HT processor, this means that this thread will not be swapped out until its scheduling quantum is met. But, during that time, the CPU will in effect be idle for probably 90% of the time due to all the cache misses. Since the thread won't be swapped out, your CPU will effectively be used for only 10% of the time during that quantum, then the next thread is allowed to run. With HT, both threads are loaded and those 90% of the cycles that the "bad" thread would waste can actually be used by the other thread.
    Reply
  • xtknight - Thursday, March 31, 2005 - link

    #11-not sure what you mean by "processing efficiency". all HT does is virtually separate the processor into two threads. maybe I'm missing something, but I can't figure out why everyone associates HT with performance gain. Reply
  • PeteRoy - Thursday, March 31, 2005 - link

    The future of processors is Software that make use of them. Reply
  • hectorsm - Thursday, March 31, 2005 - link

    Does anyone know why Fred thinks that HT is a misuse of resources?

    Doesn't HT increase processing efficiency by 10-30%?

    Sounds to me like he got it backward.
    Reply
  • xsilver - Thursday, March 31, 2005 - link

    Could it be that possibly the reason for the slowdown in clock increases is not due to AMD/Intel R&D but rather software companies that are not keeping up.... As far back as I can remember many programs were able to utilize the new speed increases effectivly whereas now, a budget "3000" cpu is already kinda overkill for many office apps....
    gaming is the only arena where the software is pushing the hardware (maybe video editing too but that market is much smaller?)

    there needs to be more innovation on the software front to utilize the added hardware benefits... is a positive reinforncement routine....
    If there was that push, I have no doubt that the speed increases would happen at a much better rate
    Reply
  • Calin - Thursday, March 31, 2005 - link

    An architecture with several cores, with one more powerful than the others, requests the programmer to tell to each thread what kind of performance it needs. While this could be accepted by console developers (that work very close to the hardware layers), you can say bye bye to easy porting to that platform.
    while the performance increase can be substantial, the trade off is very specific code even at the highest level
    Reply
  • Jeff7181 - Thursday, March 31, 2005 - link

    Comment WAS mad on HT...

    "Fred’s response to this question was thankfully straight forward; he isn’t a fan of Intel’s Hyper Threading in the sense that the entire pipeline is shared between multiple threads, in Fred’s words 'it’s a misuse of resources.'"
    Reply
  • Zebo - Thursday, March 31, 2005 - link

    Wish some comment was made on HT, intel only real saving grace for last couple years. Guess with DC it becomes a non-issue though at that point.


    Hehe nice to see CPU world going full circle... AMD copied Intel like nobodies biz now it's the other way around. Props to AMD for innovating dispite thier punny size.. they definity should be rewarded by sales. I know I made the right choice with A64, the latency he mentions you can feel all the time, hard to "benchmark" it other than system just feels snappy compared to any other CPU I've used to including a P4C oC'ed to 3.4, A-XP OCed to 2.7, and IBM chips from apple at 2.5.
    Reply
  • bupkus - Thursday, March 31, 2005 - link

    Reduced processor complexity is a step neither manufacturer is willing to take.
    OR
    Neither manufacturer appears willing to reduce processor complexity.
    Reply

Log in

Don't have an account? Sign up now