Intel has already disclosed that it will have a next generation Atom core, code named Tremont, which is to appear in products such as the Foveros-based hybrid Lakefield, as well as Snow Ridge designed for 5G deployments. In advance of the launch of the core and the product, it is customary for some documentation and tools to be updated to prepare for it; in this case, one of those updates has disclosed that the Tremont core would contain an L3 cache – a first for one of Intel’s Atom designs.

01.org is an Intel website which hosts all of its open source projects. One of those projects is perfmon, a simple performance monitoring tool that can be used by developers to direct where code may be bottlenecked by either throughput, memory latency, memory bandwidth, TLBs, port allocation, or cache hits/misses. In this case, the profiles for Snow Ridge have been uploaded to the platform, and one of the counters provided includes provisions for L3 cache monitoring. This provision is directly listed under the Tremont heading.

Enabling an L3 cache on Atom does two potential things to Intel’s design: it adds power, but also adds performance. By having an L3, it means that data in the L3 is quicker to access than it would be in memory, however there is an idle power hit by having L3 present. Intel can mitigate this by enabling parts of the L3 to be powered on as needed, but there is always a tradeoff. There can also be a hit to die area, so it will be interesting to see how Intel has changed the microarchitecture of it’s Atom design. There is also no indication if the Tremont L3 cache is an inclusive cache, or a non-inclusive cache, or if it can be pre-fetched into, or if it is shared between cores or done on a per-core basis.

Intel’s Atom roadmap, as disclosed last year at Architecture day, shows that the company is planning several more generations of Atom core, although beyond Tremont we get Gracemont in 2021, and beyond that is ‘increased ST Perf, Frequency, Features’ listed around 2023. In that time, Intel expects to launch Sunny Cove, Willow Cove, and Golden Cove on the Core side.


Lakefield

The first public device with Tremont inside is expected to be the Core/Atom hybrid Lakefield processor, which uses Intel’s new Foveros stacking technology. We know that this design will have one Sunny Cove core and pair it with four Tremont cores. Intel expects chip production of Lakefield for consumer use by the end of the year.

Related Reading

Source: InstLatX64, 01.org

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  • mode_13h - Wednesday, July 17, 2019 - link

    In addition to the ASRock board, there's also the Odroid H2, which Gemini Lake-based and a similar price. Obviously, case selection is far more limited, but at least you can go smaller than mini-ITX.

    BTW, Intel makes certain NUC models for heavy-duty use (i.e. built for sustained high CPU load).
    Reply
  • abufrejoval - Tuesday, July 23, 2019 - link

    What's nice about the Odroid is an M.2 SSD slot: The ASRock only has SATA, but 4 ports via an ASMedia SATA controller. On the other hand, the entire SoC can't really handle anything much beyond 5-6Gbit anyway, so the major M.2 advantage may be size and the M.2 premiums at least have largely disappeared.

    It also maintains the 32GB RAM capacity, which is an incredible bonus, if you want to run a couple of low compute yet significant size (RAM+SSD) virtual appliances at lowest noise/energy. And RAM is so *cheap* these days: I wish they had 4x SO-DIMM Mini-ITX motherboards for 64GB of RAM at €300! (and with ECC)

    Just having a 12V power supply is another huge benefit: The 12V to ATX conversion units take a lot of space and are most likely wasting electricity: The Odroid has it, I have not seen any affordable cheap Mini-ITX variants that have it, too.

    Of course the Odroid has a lower bin SoC with fewer GPU EUs and 300MHz less clock at the same TDP: Perhaps not a killer criterion, but given a choice, I know where I tend to aim...

    The two RealTek NICs may be a mixed blessing: I really want something that goes along with the 5Gbit theme here, either a 2.5 or 5Gbit NBase-T NIC to match what USB 3 does, too.

    You can get 5Gbit Ether for USB 3.1 but these NICs easily double the price of the entire system: RealTek has a 2.5 Gbit chip (supposedly even a 5Gbit one) that won't cost an arm and a leg and are a match so much better to these silent SSD systems you can have a affordable prices these days.

    Sure, let there be "tape" in the form of >10TB HDDs on an Atom server node, if you need that space. But please, only turn it on during backups, otherwise let's stick to 100% passive and no-noise, please!

    What's still missing: ECC. But that costs an arm and a leg, except with AMD. Yet, they don't offer 15-45 Watt TDP APUs for the current Ryzens just yet (or at least not in retail).

    Intel overcharges like crazy for C3000 Denvertons that support it and Xeon 2000 in the 35Watt TDP range are paper launches from what Google can find in terms of purchasable motherboards.

    The market is segmenting in ways that enable few cross-over products or synnergies.

    You either go down the performance road with normal DIMM sockets and CPU/APUs in the >65 Watt TDP range, or you have 15-35Watt TDP soldered-on BGA systems with SO-DIMMs that aren't available in PC form factors like Mini-ITX. NUC is the only mobile-technology/desktop-use-case product you can get and typically that means no control over fans and noise.

    Expandability is all external via ThunderBolt/USB4 (good), but that market still has Mac prices.

    I don't know if SO-DIMMs as a form factor are really a technical challenge vs. normal DIMMs (shorter traces should always be good in GigaHertz), but if they aren't I'd sure like them to be universally adopted, just because space is a premium, but shouldn't be in price.
    Reply
  • mode_13h - Monday, July 15, 2019 - link

    The real reason you couldn't get them was the supply-crunch in Intel's 14 nm fabs. As those were lower-margin parts, they went to the back of the queue.

    I think Intel's 14 nm supply issues have largely been alleviated, by now. Perhaps somewhat due to a dip in demand.
    Reply
  • abufrejoval - Tuesday, July 16, 2019 - link

    I understood the first part.

    But I would not have thought that these issues are over *and* that chips are being delivered to OEMs again: It takes a while for chips to go through fabs and into finished products, I'd say months of lead-time.

    And it's not like Gemini Lake were generally available all over the place. I really only found one source and it only had a few.

    In any case I count myself lucky I found and got them: They are really nice IT Lego bricks, when VMs or containers won't do!
    Reply
  • mode_13h - Wednesday, July 17, 2019 - link

    Well, I don't really know what the supply situation is like, but Odroid H2's have been back in stock for a while, I believe. Reply
  • Lord of the Bored - Monday, July 15, 2019 - link

    "beyond that is ‘increased ST Perf, Frequency, Features’ listed around 2023."

    Worst codename ever.
    Reply
  • mode_13h - Monday, July 15, 2019 - link

    Actually, if you look at the slide, the codename for the 2023 core is "'Next' Month". Probably a spellcheck autocorrect error, as they obviously meant "'Next' Mont".

    IMO, NextMont wouldn't be so bad, except I don't know what you'd call the one after that. Kinda like GCN...
    Reply
  • HStewart - Monday, July 15, 2019 - link

    Somebody has the wrong document for - if you search for 2018 Architexture Day you can find a document and it states "Next Mont" not "next Month",

    https://www.servethehome.com/wp-content/uploads/20...
    Reply
  • Ian Cutress - Tuesday, July 16, 2019 - link

    At the presentation photo vs after presentation edited slide deck Reply
  • Qasar - Tuesday, July 16, 2019 - link

    if i search for " 2018 Architexture Day " all i find are articles that have nothing to do with cpus., but if i search for 2018 Architecture Day " then i find some articles about cpus... looks like hstewart STILL doesnt know how to spell it right. Reply

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