AMD Zen 2 Microarchitecture Analysis: Ryzen 3000 and EPYC Rome
by Dr. Ian Cutress on June 10, 2019 7:22 PM EST- Posted in
- CPUs
- AMD
- Ryzen
- EPYC
- Infinity Fabric
- PCIe 4.0
- Zen 2
- Rome
- Ryzen 3000
- Ryzen 3rd Gen
Windows Optimizations
One of the key points that have been a pain in the side of non-Intel processors using Windows has been the optimizations and scheduler arrangements in the operating system. We’ve seen in the past how Windows has not been kind to non-Intel microarchitecture layouts, such as AMD’s previous module design in Bulldozer, the Qualcomm hybrid CPU strategy with Windows on Snapdragon, and more recently with multi-die arrangements on Threadripper that introduce different memory latency domains into consumer computing.
Obviously AMD has a close relationship with Microsoft when it comes down to identifying a non-regular core topology with a processor, and the two companies work towards ensuring that thread and memory assignments, absent of program driven direction, attempt to make the most out of the system. With the May 10th update to Windows, some additional features have been put in place to get the most out of the upcoming Zen 2 microarchitecture and Ryzen 3000 silicon layouts.
The optimizations come on two fronts, both of which are reasonably easy to explain.
Thread Grouping
The first is thread allocation. When a processor has different ‘groups’ of CPU cores, there are different ways in which threads are allocated, all of which have pros and cons. The two extremes for thread allocation come down to thread grouping and thread expansion.
Thread grouping is where as new threads are spawned, they will be allocated onto cores directly next to cores that already have threads. This keeps the threads close together, for thread-to-thread communication, however it can create regions of high power density, especially when there are many cores on the processor but only a couple are active.
Thread expansion is where cores are placed as far away from each other as possible. In AMD’s case, this would mean a second thread spawning on a different chiplet, or a different core complex/CCX, as far away as possible. This allows the CPU to maintain high performance by not having regions of high power density, typically providing the best turbo performance across multiple threads.
The danger of thread expansion is when a program spawns two threads that end up on different sides of the CPU. In Threadripper, this could even mean that the second thread was on a part of the CPU that had a long memory latency, causing an imbalance in the potential performance between the two threads, even though the cores those threads were on would have been at the higher turbo frequency.
Because of how modern software, and in particular video games, are now spawning multiple threads rather than relying on a single thread, and those threads need to talk to each other, AMD is moving from a hybrid thread expansion technique to a thread grouping technique. This means that one CCX will fill up with threads before another CCX is even accessed. AMD believes that despite the potential for high power density within a chiplet, while the other might be inactive, is still worth it for overall performance.
For Matisse, this should afford a nice improvement for limited thread scenarios, and on the face of the technology, gaming. It will be interesting to see how much of an affect this has on the upcoming EPYC Rome CPUs or future Threadripper designs. The single benchmark AMD provided in its explanation was Rocket League at 1080p Low, which reported a +15% frame rate gain.
Clock Ramping
For any of our users familiar with our Skylake microarchitecture deep dive, you may remember that Intel introduced a new feature called Speed Shift that enabled the processor to adjust between different P-states more freely, as well as ramping from idle to load very quickly – from 100 ms to 40ms in the first version in Skylake, then down to 15 ms with Kaby Lake. It did this by handing P-state control back from the OS to the processor, which reacted based on instruction throughput and request. With Zen 2, AMD is now enabling the same feature.
AMD already has sufficiently more granularity in its frequency adjustments over Intel, allowing for 25 MHz differences rather than 100 MHz differences, however enabling a faster ramp-to-load frequency jump is going to help AMD when it comes to very burst-driven workloads, such as WebXPRT (Intel’s favorite for this sort of demonstration). According to AMD, the way that this has been implemented with Zen 2 will require BIOS updates as well as moving to the Windows May 10th update, but it will reduce frequency ramping from ~30 milliseconds on Zen to ~1-2 milliseconds on Zen 2. It should be noted that this is much faster than the numbers Intel tends to provide.
The technical name for AMD’s implementation involves CPPC2, or Collaborative Power Performance Control 2, and AMD’s metrics state that this can increase burst workloads and also application loading. AMD cites a +6% performance gain in application launch times using PCMark10’s app launch sub-test.
Hardened Security for Zen 2
Another aspect to Zen 2 is AMD’s approach to heightened security requirements of modern processors. As has been reported, a good number of the recent array of side channel exploits do not affect AMD processors, primarily because of how AMD manages its TLB buffers that have always required additional security checks before most of this became an issue. Nonetheless, for the issues to which AMD is vulnerable, it has implemented a full hardware-based security platform for them.
The change here comes for the Speculative Store Bypass, known as Spectre v4, which AMD now has additional hardware to work in conjunction with the OS or virtual memory managers such as hypervisors in order to control. AMD doesn’t expect any performance change from these updates. Newer issues such as Foreshadow and Zombieload do not affect AMD processors.
Facebook
Twitter
RSS
216 Comments
View All Comments
Kjella - Thursday, June 13, 2019 - link
The Ryzen 1800x got dropped $150 in MSRP nine months after launch, I think AMD thought octo-core might be a niche market they needed strong margins on but realized they'd make more money making it a mainstream part. I bought one at launch price and knew it probably wouldn't be great value but it was like good enough, let's support AMD by splurging on the top model. Very happy it's now paying off, even though I'm not in the market for a replacement yet.deltaFx2 - Tuesday, June 11, 2019 - link
@jjj: Rriigght... Moore's law applies to transistors. You are getting more transistors per sq. mm, and that translates to more cores. ST performance is an arbitrary metric you came up with. It's like expecting car power output (HP/W) go increase linearly every new model and it does not work that way. Physics. So, they innovate on other things like fuel economy, better drive quality, handling, safety features... it's life. We aren't in the 1980s anymore where you got 2x ST perf from a process shrink. Frequency scaling is long dead.The other thing you miss is that the economies of scale you talk about are dying. 7nm is *more* expensive per transistor than 28nm. Finfet, quad patterning, etc etc. So "TSMC gives them more perf per dollar" compared to what? 28nm? No way. 14nm? Nope.
RedGreenBlue - Tuesday, June 11, 2019 - link
Multi-threaded performance does have an effect on single threaded performance in a lot of use cases. If you can afford a 12 core cpu instead of an 8, you would end up with better performance in the following situation: You have one or two multithreaded workloads that will have the most throughput when maxing out 7 strong threads, you want to play a game or run one task that is single-threaded. That single-threaded task is now hindered by the OS and any random updates or processes running in the background.Point being, if you ever do something that maxes out (t - 1) cores, even if there's only one thread running on each, then suddenly your single threaded performance can suffer at the expense of a random OS or background process. So being able to afford more cores will improve single-thread performance in a multitasking environment, and yes multitasking like that is a reality today in the target market AMD is after. So get over it, because that's what a lot of people need. Nobody cares about you, it's the target market AMD and Intel care about.
FunBunny2 - Wednesday, June 12, 2019 - link
"You have one or two multithreaded workloads that will have the most throughput when maxing out 7 strong threads, you want to play a game or run one task that is single-threaded."the problem, as stated for years: 'they ain't all that many embarrassingly parallel user space problems'. IOW, unless you've got an app *expressly* compiled for parallel execution, you get nothing from multi-core/thread. what you do get is the ability to run multiple, independent programs. since we only have one set of hands and one set of eyes, humans don't integrate very well with OS/MFT. that's from the late 360 machines.
yankeeDDL - Thursday, June 13, 2019 - link
I am doing office work, and, according to Task Manager, there are ~3500 threads running on my laptop. Obviously, most threads are dormant, however, as soon as I start downloading something, while listening to music and editing an image, while the email client checks the email and the antivirus scans "everything", I will certainly have more than "10" threads active and running. Having more cores is nearly always beneficial, even for office use. I do swap often between a Core i7 5500 (2 cores, 4 threads) and a desktop with Ryzen 5 1600 (6C, 12T). It is an apples to oranges comparison, granted, but the smoothness of the desktop does not compare. The laptop chokes easily when it is downloading updates, the antivirus is scanning and I'm swapping between multiple applications (and it has 16GB of RAM - it was high end, 4 years back).2C4T is just not enough in a productivity environment, today. 4C8T is the baseline, but anyone looking to future-proof its purchase should aim for 6C12T or more. Intel's 9 gen is quite limited in that respect.
Ratman6161 - Friday, June 14, 2019 - link
Personally I would ignore anything to do with pricing at this point. The MSRP can be anything they want, but the street prices on AMD processors have traditionally been much lower. At ouor local Microcenter for example, 2700X can be had for $250 while the 2700 is only $180. On the new processors, if history is any indicator, prices will fall rapidly after release.mode_13h - Tuesday, June 11, 2019 - link
I think the launch prices won't hold, if that's your main gripe.I would like to be able to buy an 8-core that turbos as well as the 16-core, however. I hope they offer such a model, as their yields improve. I don't need 16 cores, but I do care about single-thread perf.
azazel1024 - Tuesday, June 11, 2019 - link
I have a financial drain right now, but once that gets resolved in (hopefully) a couple of months I think I am finally going to upgrade my desktop with Zen 2. Probably look at one of the 8-core variants. I am running an i5-3570 driven at 4Ghz right now.So the performance improvement should be pretty darned substantial. And I DO a lot of multithread heavy applications like Handbrake, Photoshop, lightroom and a couple of others. The last time I upgraded was from a Core 2 Duo E6750 to my current Ivy Bridge. That was around a 4 year upgrade (I got a Conroe after they were deprecated, but before official EOL and manufacturing ceasing) IIRC. Now we are talking something like 6-7 years from when I got my Ivy Bridge to a Zen 2 if I finally jump on one.
E6750 to i5-3570 represented about a 4x increase in performance multithreaded in 4 years (or ballpark). i5-3570 to 3800x would likely represent about a 3x improvement in multithreaded in 6-7 years.
I wonder if I can swing a 3900x when the time comes. That would be probably somewhat over 4x performance improvement (and knowing how cheap I am, probably get a 3700x).
Peter2k - Tuesday, June 11, 2019 - link
Yeah, but you have to say something negative about everythingbobhumplick - Tuesday, June 11, 2019 - link
i agree. i mean its an incredible cpu line. but just throwing all of that extra die space and power budget at just more cores and cahce. i mean look at the cache to core ratio. when cpu makers just throw more cache or cores at a node shrink it can be because that makes the most sense at the time(the market, workloads, or supporting tech like dram have to catch up to enaable more per core performance) but it can also mean they just didnt know what else to do with the space.maybe its just not possible to go much beyond the widths modern cpus are approaching. even intel is using a lot of space up for avx 512 which is similar to just adding more cores (more fpu crunchers ) so its possible that neither company knows how to balance all those intructions in flight or make use of more execution resources. maybe cores cant get much more performance.
but if so that means a prettyy boring future. especially if programmers cant find ways to use those cores in more common tasks