Ice Lake 10nm Xeon Scalable On Display

One of the more sedate talks at the event was discussing Intel’s approach in the datacenter. We’ve covered this story in detail, especially at Intel’s Data-Centric Summit only a few months ago. Intel has stated that Cascade Lake and Cooper Lake are the next two products for the enterprise market, both built on 14nm, focusing on enhanced security as well as AI instructions to help with acceleration. We also know that after these two Intel will have Ice Lake Scalable built on 10nm, but that’s about it.

To be honest, we don’t actually know much more than what we did back then. Intel confirmed that Ice Lake will be built using Sunny Cove cores. But Intel also showed off what they said was an Ice Lake Xeon 10nm processor and package, as shown in the image above.

Color me skeptical, but what was held up is likely either not ICL-SP or just silicon that doesn’t work. In order to make those products, Intel would have to have pumped out at least one large (350mm2+?) die that worked and then put it into a package with a heatspreader. Intel finally seems to be happy discussing a few products on 10nm, as shown at this event, but all the 10nm hardware is based on tiny 100mm2 or smaller silicon. Given Intel’s documented problems, I would have loved that CPU that was held up in the air to be Ice Lake-SP. But I’ll need to see something more concrete to believe it at this point; it’s too much of a jump.

Ending Intel’s Architecture Day

As I’m writing this, it is 3am PT and only a couple of hours away from Intel’s listed embargo time. The event finished 10 hours ago (a few of us skipped the end event drinks to get to writing) and despite the short time to write it all up, it was a good event overall. For the first time in a good while, Intel decided to talk shop, and in an honest way with very little hand waving. One could argue that in every discussion point, Intel raised more questions than they answered, but the positive here is that questions are being answered, and Intel is willing to share things like roadmaps into 2021, demonstrations of some exciting new products for 2019/2020, and a taste of how they are progressing in both manufacturing and microarchitecture. Hopefully Intel will feel the same and this can become a yearly cadence. The trio of Keller, Koduri, and Murthy, is a strong team to field to the press, and this event fits that bill.

To end this piece, I’m going to put in the Q&A section from day’s presentations, as well as some of the questions put in my particular round-table. It’s an interesting read, and it helps that Jim is full of memorable quotes.

Intel’s First Fovoros and First Hybrid x86 CPU: Core plus Atom in 7 W on 10 nm Intel Made Something Really Funny: Q&A with Raja, Jim, and Murthy
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  • prisonerX - Wednesday, December 12, 2018 - link

    And you're a special brand of pathetic. Congrats.

    Don't worry though, one day you'll hit puberty and things will improve.
    Reply
  • LogitechFan - Wednesday, December 12, 2018 - link

    Oh yes, amdturds are THE breed of stupid to behold... Reply
  • drunkenmaster - Wednesday, December 12, 2018 - link

    Would that be Marvell's chip from 3 years ago that suddenly people are talking about... which is just a chip on an interposer with an HBM chip. HBM which AMD co-developed, had prototype APU packages using it in 2011 and launched Fury X with HBM on an interposer 3 years ago.

    Right, but AMD didn't pioneer it, because Marvell made a dramatically less complex switch using the same concept at the same time AMD did, but you know, AMD co-developed the memory, they worked with the packaging plants for years to be able to mass produce interposer packaged products and Fury X was the reason HBM went into full production in the first place.... but sure, AMD definitely didn't pioneer this latest move.
    Reply
  • ajc9988 - Wednesday, December 12, 2018 - link

    http://www.eecg.toronto.edu/~enright/micro14-inter... http://www.eecg.toronto.edu/~enright/Kannan_MICRO4... https://youtu.be/G3kGSbWFig4 https://seal.ece.ucsb.edu/sites/seal.ece.ucsb.edu/... https://www.youtube.com/watch?v=d3RVwLa3EmM&t=... Reply
  • qap - Wednesday, December 12, 2018 - link

    Well ... yeah. Intel had multi-chip CPUs almost 15 years ago (look for Pentium D). And it was mocked by AMD and its fans.
    I thought that the mocking intel did last month was just to remind AMD, what they said then and I found it hilarious. But maybe not. People don't change and it's completely plausible, that it was said by someone, who does't know the history.
    Reply
  • Topweasel - Wednesday, December 12, 2018 - link

    Never Mocked by AMD. They just made sure to point out that their 2 cores with the X2 and quad with the Phenom where "real" multicore chips. It mattered more back then because Intel's boards had FSB's instead of direct connections and the separate chips had to talk through the FSB and chipset northbridge to talk to each other. Also AMD hadn't been rambling on thier glue tech for years (with no product yet on market using it (Kaby-G isn't actual EMIB)) when they made their statements.

    AMD promoted their products said they are better because they were real. There is a negative connotation with that. But that is different then calling out your competitor for using "glue".
    Reply
  • 29a - Wednesday, December 12, 2018 - link

    "Well ... yeah. Intel had multi-chip CPUs almost 15 years ago (look for Pentium D). And it was mocked by AMD and its fans."

    I think pretty much everyone mocked anything P4 related, you have to admit it was pretty bad.
    Reply
  • FreckledTrout - Wednesday, December 12, 2018 - link

    What's P4? To flush it down the toilet. Reply
  • tshoobs - Wednesday, December 12, 2018 - link

    Never heard that one before! So true, the P4 was such an embarrassment. Reply
  • JlHADJOE - Wednesday, December 12, 2018 - link

    lol this takes me right back to the days of the P4, and the awesome "x is good... for me to POOP on!" meme Reply

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