Intel’s First Fovoros and First Hybrid x86 CPU: Core plus Atom in 7 W on 10 nm

Perhaps someone will correct me, but I can’t ever remember a time when Intel has put multiple x86 cores of different configurations on the same bit of silicon (ed: Intel Edison). Ever since Arm starting doing it with its big.Little designs in smartphones, a perennial question was if Intel was going to do something similar, either with big and small Atom cores, or by moving a high-performance Core into the mix. When Intel left the smartphone and tablet market, we assumed the idea was dead. But, like a reanimated zombie, it has risen from the grave. Enter Intel’s Hybrid x86 CPU.

This tiny 12x12 package is built using Intel’s Fovoros technology, using a 22FFL IO chip as the active interposer connected with TSVs to a 10nm die that contains both a single Sunny Cove core and four Atom (Tremont?) cores. This tiny chip is smaller than a dime, and is designed to have a 2 mW standby power. It would appear that this chip is destined for mobile devices.

Here’s the manufacturing diagram, showing the idea that POP memory is placed over the Fovoros design to give the final product. Very much like a mobile chip.

The demo system that Intel had on display looked similar to the previous Sunny Cove design, however this heatsink was smaller and it had a few different connectors. We were told that this chip will support PCIe for M.2 as well as UFS, both of which are found in mobile. There also looked like a couple of SIM card connectors on this motherboard.

The key part of this discussion however is this block diagram that was on one of the Intel slides. Here we see a single ‘Big CPU’ with 0.5 MB of private medium level cache, four ‘Small CPU’s with a shared 1.5 MB L2 cache, an uncore that has 4MB of last level cache, a quad-channel memory controller (4x16-bit) with support for LPDDR4, a 64 EU design with Gen11 graphics, the Gen 11.5 display controller, a new IPU, MIPI support with DisplayPort 1.4, and all of this in a tiny package.

Seriously though, this has the potential to be a large revenue stream for Intel. They’ve made this chip, which allows the cores to enter C6 sleep states when not in use, that has a die size smaller than 12x12mm (144 mm2), and target the sub-7W fanless device market. That’s with a big Core, four Atom cores, and a GT2 64 EU design.

Intel actually says that the reason why this product came about is because a customer asked for a product of about this performance but with a 2 mW standby power state. In order to do this, Intel created and enhanced a number of technologies inside the company. The final product is apparently ideal for the customer, however the chip will also be made available for other OEMs.

In our Q&A session with the senior members of Intel, it was clear that this technology is still in its infancy, and Intel now has a new toy to play with. Jim Keller stated that internally they are trying lots of new things with this technology to see what works and what would make a good product, so we should be seeing more Foveros designs through 2019 and 2020.

Changing How Chips are Made: 3D Packaging with FOVEROS Ice Lake 10nm Xeon Scalable On Display
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  • CajunArson - Wednesday, December 12, 2018 - link

    There's nothing whatsoever revolutionary about "chiplets". A 10 year old core 2 quad used exactly the same technology that AMD calls "chiplets" in 2019 and AMD fantards like you even insulted the Core 2 quad for doing it.

    Maybe you should actually read the article about what a active interposer can do vs. wiring standard hunks of silicon to a PCB in literally the same way it was done in the 1970s before you run around acting like AMD is the only company to ever innovate anything.
    Reply
  • sgeocla - Wednesday, December 12, 2018 - link

    I've been reading articles about Intel 10nm promises for years now. And then we got failed laptop chips and low power pc boxes to appease 'mass production' status and not get sued by investors for false claims.
    Forgive me if I abstain my drooling until Intel actually delivers something that does not require industrial chillers. BTY where is that 28 core HEDT chips anyway ?
    Reply
  • Targon - Wednesday, December 12, 2018 - link

    There is always a point where the WHEN something is used sets a new direction. Multi-CPU in a workstation/server moving to a single processor with multiple cores was a big shift. Moving from two cores linked together when cache coherency was a big problem to a single dual-core without an interposer was a better way to go. It all comes down to if there is a performance boost or degradation as a result of the technology/implementation.

    With that said, a single CPU with 64 cores is fairly significant, and keeping the performance from being horrible with that many cores is the reason AMD has been praised. Price/performance for the server market and such.

    For a long time, Intel was seen as the king when it came to clock speeds and performance, but Intel hasn't had a significant boost to IPC in over three years. Intel has also been promising 10nm for three years, and still no sign of it, with the promise of holidays 2019.

    So, Intel still has nothing, they have vague promises of ways they will improve performance, but it remains to be seen if the performance will actually be better if 10nm slips again. On the flip side, AMD clearly has significant performance boosts from Ryzen 3rd generation in 2019(March/April being when many expect it). 7nm from AMD isn't a, "will they?" question, it isn't even a "when?", with CES in one month and with it, the answers. IPC improvements due to design improvements not related to chiplets at all would be good, as well as higher clock speeds. So, there is a potential for 30+ percent higher performance in one generation.

    Yes, I don't expect AMD to deliver huge performance jumps again for years, but we may see things such as Gen-Z support, going beyond two memory channels for the mainstream Ryzen chips when the next socket comes out in 2020/2021, and other things that may boost system/platform performance while AMD figures out how to get more CPU performance.

    Intel is still trying to do things the same way, just faster. Faster CPU, faster links to individual devices, fabric on a system level will be Intel trying to reinvent what AMD has been working toward.

    I will also note again that some things are not always about being new, but are more about presentation and implementation. Palm really popularized the idea of apps that users could install on a small portable device(PDA), but Apple popularized it with the iPhone. In some cases, the implementation really is good, and will get the respect of the industry, in other cases, you see that something is clearly a case of following the lead of another player.

    So, in the PC industry, is Intel leading the way with innovations, or is AMD in the drivers seat?
    Reply
  • iwod - Thursday, December 13, 2018 - link

    No one insulted Core 2 Quad for doing it, and neither did AMD. But Intel did Insult AMD and went on full force bad mouthing AMD. Reply
  • Spunjji - Thursday, December 13, 2018 - link

    Using a term like "fantard" straight-up devalues your argument, but the blatantly false statement about the C2Q using "exactly the same technology" seals the deal.

    Chiplets refers to the CPU being divided into multiple sections (cores and un-core) on a single package using dedicated interconnects. It's not at all the same technology as having two discrete CPUs joined by the FSB on a single package. Both are novel approaches to particular problems, although the C2Q (and Pentium D before it) were criticized for their inefficiency by using the FSB for inter-core communication. We don't know how "chiplets" will pan out yet, so the jury's out.

    Bash the fans for talking nonsense all you want, but maybe don't sink to their level.
    Reply
  • edzieba - Wednesday, December 12, 2018 - link

    If you think through-package interconnects compare to through-silicon interconnects, then I have some HBM on DIMMs to sell you. Reply
  • Spunjji - Thursday, December 13, 2018 - link

    Noice. :D Reply
  • III-V - Wednesday, December 12, 2018 - link

    I love how everyone thinks AMD is the pioneer with chiplets. They're not. That would be Marvell.

    And Intel themselves has been hinting that it's a good way to go, looking at their EMIB solution.

    But AMD fan boys are a special breed of stupid...
    Reply
  • sgeocla - Wednesday, December 12, 2018 - link

    The electric car was pioneered more than a hundred years.
    It's one thing to pioneer something and a whole different thing to actually develop it into something that is affordable to millions and drags the whole industry forward.

    If you think pioneering is all there is to it I have hundreds of grapehene battery designs you should invest you narrow-minded-driven life savings into.
    Reply
  • evernessince - Wednesday, December 12, 2018 - link

    You have some issues buddy. How about not being toxic next time. Reply

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