Conclusion: I Actually Used the Cannon Lake Laptop as a Daily System

When we ordered the Lenovo laptop, not only was I destined to test it to see how well Intel’s 10nm platform performs, but I also wanted to see what the device was like to actually use. Once I’d removed the terrible drives it came with and put in a 1TB Crucial MX200 SSD, I started to put it to good use.

The problem with this story is that because this is a really bad configuration of laptop, it gives the hardware very little chance to show its best side. We covered this in our overview of Carrizo several years ago, after OEM partners kept putting chips with reasonable performance into the worst penny pinching designs. The same thing goes with this laptop – it is an education focused 15.6-inch laptop whose screen is only 1366x768, and the TN panel’s best angle to view is as it is tilted away from you. It is bulky and heavy but only has a 34 Wh battery, whereas the ideal laptop is thin and light and lasts all day on a single charge. From the outset, using this device was destined to be a struggle.

I first used the device when I attended Intel’s Data Summit in mid-August. On the plane I didn’t have any space issues because I had reserved a bulkhead economy seat, however after only 4 hours or so of light word processing on a low screen brightness, I was already out of battery. Thankfully I could work on other things on my second laptop (always take two laptops to events, maybe not day-to-day at a show, but always fly with two). At the event, I planned to live blog the day of presentations. This means being connected online, uploading text, and being of a sufficient brightness to see the screen. After 90 minutes, I had 24% battery left. This device has terrible battery life, a terrible screen, is bulky, and weighs a lot.

I will say this though, it does have several positives. Perhaps this is because the RX540 is in the system, but the Windows UI was very responsive. Now of course this is a subjective measure, however I have used laptops with Core i7 and MX150 hardware that were slower to respond than this. It did get bogged down when I went into my full workflow with many programs, many tabs, and many messaging software tools, but I find that any system with only 8GB of memory will hit my workflow limits very quickly. On the natural responsiveness front, I can’t fault it.

Ultimately I haven’t continued to use the laptop much more – the screen angle required to get a good image, the battery life, and the weight are all critical issues that individually would cause me to ditch the unit. At this price, there are plenty of Celeron or Atom notebooks that would fit the bill and feel nicer to use. I couldn’t use this Ideapad unit with any confidence that I would make it through an event, either a live blog or a note taking session, without it dying. As a journalist, we can never guarantee there will be a power outlet (or an available power outlet) at the events we go to, so I always had to carry a second laptop in my bag regardless. The issue is that the second laptop I use often lasts all day at an event on its own.

Taking Stock of Intel’s 10nm Cannon Lake Design

When we lived in a world with Intel’s Tick Tock, Cannon Lake would be a natural tick – a known microarchitecture with minor tweaks but on a new process node. The microarchitecture is a tried and tested design, as we now have had four generations of it from Skylake to Coffee Lake Refresh, however the chip just isn’t suitable for prime time.

Looking at how Intel has presented its improvements on 10nm, with features like using Cobalt, Dummy Gates, Contact Over Active Gates, and new power design rules, if we assume that every advancement works perfectly then 10nm should have been a hit out of the gate. The problem is, semiconductor design is like having 300 different dials to play with, and tuning one of those dials causes three to ten others to get worse. This is the problem Intel has had with 10nm, and it is clear that some potential features work and others do not – but the company is not saying which ones for competitive and obvious reasons.

At Intel’s Architecture Day in December, the Chief Engineering Officer Dr. Murthy Renduchintala was asked if the 10nm design had changed. His response was contradictory and cryptic: ‘It is changing, but it hasn’t changed’. At that event the company was firmly in the driving seat of committing to 10nm by the end of 2019, in a quad core Ice Lake mobile processor, in a new 3D packaging design called Lakefield, in an Ice Lake server CPU for 2020, and in a 5G/AI focused processor called Snow Ridge. Whatever 10nm variant of the process they’re planning to use, we will have to wait and see.

I’ll go back to this slide that Intel presented back at the Technology and Manufacturing Day:

In this slide it shows on the right that 10nm (and its variants) have lower power through lower dynamic capacitance. However, on the left, Intel shows both 10nm (Cannon Lake) and 10nm+ (Ice Lake) as having lower transistor performance than 14nm++, the current generation of Coffee Lake processors.

This means we might not see a truly high-performance processor on 10nm until the third generation of the process is put into place. Right now, based on our numbers on Cannon Lake, it’s clear that the first generation of 10nm was not ready for prime time.

Cannon Lake: The Blip That Almost Didn’t Happen

We managed to snap up a Cannon Lake chip by calling in a few favors to buy it from a Chinese reseller who I’m pretty sure should not have been selling them to the public. They were educational laptops that may not have sold well, and the reseller just needed to get rid of them. Given Intel’s reluctance to talk about anything 10nm at CES 2018, and we find that the chips ‘shipped for revenue’ end up in a backwater design like this, then it would look like that Intel was trying to hide them. That was our thought for a good while, until Intel announced the Cannon Lake NUC. Even then, from launch announcement to being at general retail took four months, and by that time most people had lost interest.

At some point Intel had to make good on its promises to investors by shipping something 10nm to somewhere. Exactly how many chips were sold (and to whom) is not discussed by Intel, but I have heard some numbers flying around. Based on our performance numbers, it’s obvious why Intel didn’t want to promote it. On the other hand, at least being told about it beyond a simple sentence would have been nice.

After testing the chip, the only way I’d recommend one of these things is for the AVX512 performance. It blows everything else in that market out of the water, however AVX512 enabled programs are few and far between. Plus, given what Intel has said about the Sunny Cove core, that part will have it instead. If you really need AVX512 in a small form factor, Intel will sell you a NUC.

Cannon Lake, and the system we have with it inside, is ultimately now nothing more than a curio on the timeline of processor development. Which is where it belongs.

Stock CPU Performance: Legacy Tests


View All Comments

  • eastcoast_pete - Friday, January 25, 2019 - link

    @Ian: Thanks for the deep dive, and giving the references for background! One comment, three questions (they're related): In addition to being very (overly) ambitious with the 10 nm process, I was particularly struck by the "fused-off integrated graphics" and how Intel's current 10 nm process apparently just won't play nice with the demands in a GPU setting. Question: Any information or rumors on whether that contributed to AMD going the chiplet route for Ryzen going forward? In addition to improving yields, that also allows for heterogeneous manufacturing nodes on the same final chip, so that can get around that problem. Finally, any signs that Intel may go down that road in its upcoming mainstream chips? Any updates on what node they will make their much-announced dGPUs on? Probably won't be this or a related 10 nm process.

    Lastly, and maybe you and Andrei can weigh in on that: TSMC's (different) 7 nm process seems to work okay for the (smaller) different "iGPUs" in Apple's 12/12x, Huawei's newest Kirin and the new Snapdragon. Any insight/speculation which steps of Intel's 10 nm process cause the apparent incompatibility with GPU usage scenarios?

  • Rudde - Saturday, January 26, 2019 - link

    AMD has lauched huge 7nm desktop graphics cards (2 server and Radeon VII). AMD does not seem to have any problems making gpus on TSMC 7nm. Reply
  • eastcoast_pete - Sunday, January 27, 2019 - link

    That's why I asked about the apparent incompatibility of GPU-type dies with Intel's 10 nm process. Isn't it curious that this seems to be the Achilles heel of Intel's process? I wonder if their future chips with " iGPU" will use a chiplet-type approach, with the CPU parts in 10 nm, and the GPU in 14 nm++++ or however many + generations it'd be on. The other big question is what process their upcoming high-end dGPU will be in Unless, Intel let's TSMC make that for them, too. Reply
  • velanapontinha - Friday, January 25, 2019 - link

    Every time I read Kaby G I'm instantly stormed by a Kenny G theme stuck in my head, and it ruins the rest of my day.

    Please stop.
  • skis4hire - Friday, January 25, 2019 - link

    "Fast forward several months later, to May 2018, and we still had not heard anything from Intel."

    Anton covered their statement in April, where they indicated they weren't shipping volume 10nm until sometime in 2019, and that they would instead release another 14nm product, whiskey lake, in the interim.
  • Yorgos - Friday, January 25, 2019 - link

    Thanks Ian for reminding us is every article, that we are reading a Purch media product, or a clueless editor.
    Don't forget, 386 was o 0 core CPU.
    No, it doesn't bother me as a reader, it bothers me as an engineer who designs and studies digital circuits. But hey you can't have it all, it's hard to find someone who is capable at running windows executables AND know his way in comp. arch..
  • Ryan Smith - Friday, January 25, 2019 - link

    While I'm all for constructive feedback, I have to admit I'm not sure what we're meant to be taking from this.

    Could you please articulate in more detail what exactly is wrong with the article?
  • KateH - Saturday, January 26, 2019 - link

    i interpreted it as,
    "I disagree with the distinction between 'modules' and 'cores' that is made when some journalistic endevours mention AMD's 'Construction' architecture microprocessors. I find the drawing of a line based on FPU counts inaccurate- disengenous even- given that historic microprocessors such as the renowned Intel 80386 did not feature an on-chip FPU at all, an omission that would under the definitions used by this journalist in this article cause the '386 to be described as having 'zero cores'. The philosophical exercise suggested by such a definition is, based upon my extensive experience in the industry of digital circuit design, repugnant to my sensibilities and in my opinion calls into question the journalistic integrity of this very publication!"
    or something like that
    (automatically translated from Internet Hooligan to American English, tap here to rate translation)
  • Ryan Smith - Saturday, January 26, 2019 - link

    "tap here to rate translation"

    5/5 stars. Thank you!
  • KOneJ - Sunday, January 27, 2019 - link

    Bingo. Reply

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