Living On The Edge: Intel Launches Xeon D-2100 Series SoCs

Ethernet Support

One of the benefits to the previous generation of Xeon D was its support for dual 10 gigabit Ethernet controllers integrated into the processor, thus only requiring PHY (physical layer) chips for support. For almost all of the processors in the stack, that moves up to quad 10GbE support, either through copper or fiber. These ports also support accelerated Remote Direct Memory Access (RDMA) and native Software Fault Isolation (SFI).

Taken from our Skylake-SP workshop slide decks

We confirmed with Intel that any third party PHY can be used, not just Intel. Some vendors that have already listed Xeon D-2100 motherboards have included 25 GbE support in their technical specifications – we clarified with Intel that there is no 25 GbE support included on the chip, so those system integrations must be using external MAC/PHYs or PCIe cards in order to include that support.

Intel QuickAssist Technology

On Intel’s QuickAssist Technology: this is still relatively new to most users. QAT is essentially an offload processor for a variety of cryptographic functions, including symmetric/asymmetric encryption, authentication, digital signatures, RSA, ECC, and so on. The idea is this sort of task would normally be handled by the CPU, taking up time and power that could be better spent elsewhere, and that a dedicated engine to this (QAT) would be faster and more power efficient. Intel has so far deployed QAT in its Denverton Atom C3000 series processors, Xeon Scalable chipets, and add-in PCIe cards, but it now comes to the Xeon D-2100 series as well. It was not present on the original D-1500 series processors, however Intel did have mid-cycle updates (such as the D-1553N) which had 40 Gbps QAT support.

Taken from our Skylake-SP workshop slide decks

The implementation of QAT on the Xeon D-2100 series uses its own PCIe 3.0-like interconnect inside the chip, although Intel did not elaborate as to what this entails. We do know that for the Xeon Scalable chipset implementations, the chipset requires up to 16 lanes of PCIe 3.0 to accelerate QAT, so we do expect that Intel is using the equivalent in bandwidth. We have asked for more information, as to whether the QAT engine is actually on chip, or if the PCIe silicon variant is part of the package. I would expect the former, although the latter is easier - this could be identical to the Xeon-SP 18-core silicon found in the enterprise processors, that already have 16 on-package lanes set aside for OmniPath Fabric. 

It is worth noting that 100 Gbps QAT support is only for a couple of the Xeon D-2100 processors, with a couple of others giving 40 Gbps and 20 Gbps.