Sizing Up Servers: Intel's Skylake-SP Xeon versus AMD's EPYC 7000 - The Server CPU Battle of the Decade?
by Johan De Gelas & Ian Cutress on July 11, 2017 12:15 PM EST- Posted in
- CPUs
- AMD
- Intel
- Xeon
- Enterprise
- Skylake
- Zen
- Naples
- Skylake-SP
- EPYC
Single Threaded Integer Performance: SPEC CPU2006
Even in the server market where high core count CPUs are ruling the roost, high single threaded performance is still very desirable. It makes sure that a certain level of performance is guaranteed in every situation, not just in "throughput situations" of "embarrassingly parallel" software.
SPEC CPU2017 has finally launched, but it did so while our testing was already under way. So SPEC CPU2006 was still our best option to evaluate single threaded performance. Even though SPEC CPU2006 is more HPC and workstation oriented, it contains a good variety of integer workloads.
It is our conviction that we should try to mimic how performance critical software is compiled instead of trying to achieve the highest scores. To that end, we:
- use 64 bit gcc : by far the most used compiler on linux for integer workloads, good all round compiler that does not try to "break" benchmarks (libquantum...) or favor a certain architecture
- use gcc version 5.4: standard compiler with Ubuntu 16.04 LTS. (Note that this is upgraded from 4.8.4 used in earlier articles)
- use -Ofast -fno-strict-aliasing optimization: a good balance between performance and keeping things simple
- added "-std=gnu89" to the portability settings to resolve the issue that some tests will not compile with gcc 5.x
- run one copy of the test
The ultimate objective is to measure performance in non-"aggressively optimized" applications where for some reason – as is frequently the case – a "multi-thread unfriendly" task keeps us waiting.
First the single threaded results. It is important to note that thanks to modern turbo technology, all CPUs will run at higher clock speeds than their base clock speed.
- The Xeon E5-2690 ("Sandy Bridge") is capable of boosting up to 3.8 GHz
- The Xeon E5-2690 v3 ("Haswell") is capable of boosting up to 3.5GHz
- The Xeon E5-2699 v4 ("Broadwell") is capable of boosting up to 3.6 GHz
- The Xeon 8176 ("Skylake-SP") is capable of boosting up to 3.8 GHz
- The EPYC 7601 ("Naples") is capable of boosting up to 3.2 GHz
First we look at the absolute numbers.
Subtest | Application type | Xeon E5-2690 @ 3.8 |
Xeon E5-2690 v3 @ 3.5 |
Xeon E5-2699 v4 @ 3.6 |
EPYC 7601 @3.2 |
Xeon 8176 @3.8 |
400.perlbench | Spam filter | 35 | 41.6 | 43.4 | 31.1 | 50.1 |
401.bzip2 | Compression | 24.5 | 24.0 | 23.9 | 24.0 | 27.1 |
403.gcc | Compiling | 33.8 | 35.5 | 23.7 | 35.1 | 24.5 |
429.mcf | Vehicle scheduling | 43.5 | 42.1 | 44.6 | 40.1 | 43.3 |
445.gobmk | Game AI | 27.9 | 27.8 | 28.7 | 24.3 | 31.0 |
456.hmmer | Protein seq. analyses | 26.5 | 28.0 | 32.3 | 27.9 | 35.4 |
458.sjeng | Chess | 28.9 | 31.0 | 33.0 | 23.8 | 33.6 |
462.libquantum | Quantum sim | 55.5 | 65.0 | 97.3 | 69.2 | 102 |
464.h264ref | Video encoding | 50.7 | 53.7 | 58.0 | 50.3 | 67.0 |
471.omnetpp | Network sim | 23.3 | 31.3 | 44.5 | 23.0 | 40.8 |
473.astar | Pathfinding | 25.3 | 25.1 | 26.1 | 19.5 | 27.4 |
483.xalancbmk | XML processing | 41.8 | 46.1 | 64.9 | 35.4 | 67.3 |
As raw SPEC scores can be a bit much to deal with in a dense table, we've also broken out our scores on a percentage basis. Sandy Bridge EP (Xeon E5 v1) is about 5 years old, the servers based upon this CPU are going to get replaced by newer ones. So we've made "Single threaded Sandy Bridge-EP performance" our reference (100%) , and compare the single threaded performance of all other architectures accordingly.
Subtest | Application type | Xeon E5-2690 @ 3.8 |
Xeon E5-2690 v3 @ 3.5 |
Xeon E5-2699 v4 @ 3.6 | EPYC 7601 @3.2 | Xeon 8176 @ 3.8 |
400.perlbench | Spam filter | 100% | 119% | 124% | 89% | 143% |
401.bzip2 | Compression | 100% | 98% | 98% | 98% | 111% |
403.gcc | Compiling | 100% | 105% | 70% | 104% | 72% |
429.mcf | Vehicle scheduling | 100% | 97% | 103% | 92% | 100% |
445.gobmk | Game AI | 100% | 100% | 103% | 87% | 111% |
456.hmmer | Protein seq. analyses | 100% | 106% | 122% | 105% | 134% |
458.sjeng | Chess | 100% | 107% | 114% | 82% | 116% |
462.libquantum | Quantum sim | 100% | 117% | 175% | 125% | 184% |
464.h264ref | Video encoding | 100% | 106% | 114% | 99% | 132% |
471.omnetpp | Network sim | 100% | 134% | 191% | 99% | 175% |
473.astar | Pathfinding | 100% | 99% | 103% | 77% | 108% |
483.xalancbmk | XML processing | 100% | 110% | 155% | 85% | 161% |
SPEC CPU2006 analysis is complicated, and with only a few days spend on the EPYC server, we must admit that what follows is mostly educated guessing.
First off, let's gauge the IPC efficiency of the different architectures. Considering that the EPYC core runs at 12-16% lower clockspeeds (3.2 vs 3.6/3.8 GHz), getting 90+% of the performance of the Intel architectures can be considered a "strong" (IPC) showing for the AMD "Zen" architecture.
As for Intel's latest CPU, pay attention to the effect of the much larger L2-cache of the Skylake-SP core (Xeon 8176) compared to the previous generation "Broadwell". Especially perlbench, gobmk, hmmer and h264ref (the instruction part) benefit.
Meanwhile with the new GCC 5.4 compiler, Intel's performance on the "403.gcc benchmark" seems to have regressed their newer rchitectures. While we previously saw the Xeon E5-2699v4 perform at 83-95% of the "Sandy Bridge" Xeon E5-2690, this has further regressed to 70%. The AMD Zen core, on the other hand, does exceptionally well when running GCC. The mix of a high percentage of (easy to predict) branches in the instruction mix, a relatively small footprint, and a heavy reliance on low latency (mostly L1/L2/8 MB L3) seems to work well. The workloads where the impact of branch prediction is higher (somewhat higher percentage of branch misses) - gobmk, sjeng, hmmer - perform quite well on "Zen" too, which has a much lower branch misprediction penalty than AMD's previous generation architecture thanks to the µop cache.
Otherwise the pointer chasing benchmarks – XML procesing and Path finding – which need a large L3-cache, are the worst performing on EPYC.
Also notice the fact that the low IPC omnetpp ("network sim") runs slower on Skylake-SP than on Broadwell, but still much faster than AMD's EPYC. Omnetpp is an application that benefited from the massive 55 MB L3-cache of Broadwell, and that is why performance has declined on Skylake. Of course, this also means that the fractured 8x8 MB L3 of AMD's EPYC processor causes it to perform much slower than the latest Intel server CPUs. In the video encoding benchmark "h264ref" this plays a role too, but that benchmark relies much more on DRAM bandwidth. The fact that the EPYC core has higher DRAM bandwidth available makes sure that the AMD chip does not fall too far behind the latest Intel cores.
All in all, we think we can conclude that the single threaded performance of the "Zen architecture" is excellent, but it somewhat let down by the lower turbo clock and the "smaller" 8x8 MB L3-cache.
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oldlaptop - Thursday, July 13, 2017 - link
Why on earth is gcc -Ofast being used to mimic "real-world", non-"aggressively optimized"(!) conditions? This is in fact the *most* aggressive optimization setting available; it is very sensitive to the exact program being compiled at best, and generates bloated (low priority on code size) and/or buggy code at worst (possibly even harming performance if the generated code is so big as to harm cache coherency). Most real-world software will be built with -O2 or possibly -Os. I can't help but wonder why questions weren't asked when SPEC complained about this unwisely aggressive optimization setting...peevee - Thursday, July 13, 2017 - link
"added a second full-blown 512 bit AVX-512 unit. "Do you mean "added second 256 ALU, which in combination with the first one implements full 512-bit AVX-512 unit"?
peevee - Thursday, July 13, 2017 - link
"getting data from the right top node to the bottom left node – should demand around 13 cycles. And before you get too concerned with that number, keep in mind that it compares very favorably with any off die communication that has to happen between different dies in (AMD's) Multi Chip Module (MCM), with the Skylake-SP's latency being around one-tenth of EPYC's."1/10th? Asking data from L3 on the chip next to it will take 130 (or even 65 if they are talking about averages) cycles? Does not sound realistic, you can request data from RAM at similar latencies already.
AmericasCup - Friday, July 14, 2017 - link
'For enterprises with a small infrastructure crew and server hardware on premise, spending time on hardware tuning is not an option most of the time.'Conversely, our small crew shop has been tuning AMD (selected for scalar floating point operations performance) for years. The experience and familiarity makes switching less attractive.
Also, you did all this in one week for AMD and two weeks for Intel? Did you ever sleep? KUDOS!
JohanAnandtech - Friday, July 21, 2017 - link
Thanks for appreciating the effort. Luckily, I got some help from Ian on Tuesday. :-)AntonErtl - Friday, July 14, 2017 - link
According to http://www.anandtech.com/show/10158/the-intel-xeon... if you execute just one AVX256 instruction on one core, this slows down the clocks of all E5v4 cores on the same socket for at least 1ms. Somewhere I read that newer Xeons only slow down the core that executes the AVX256 instruction. I expect that it works the same way for AVX512, and yes, this means that if you don't have a load with a heavy proportion of SIMD instructions, you are better off with AVX128 or SSE. The AMD variant of having only 128-bit FPUs and no clock slowdown looks better balanced to me. It might not win Linpack benchmark competitions, but for that one uses GPUs anyway these days.wagoo - Sunday, July 16, 2017 - link
Typo on the CLOSING THOUGHTS page: "dual Silver Xeon solutions" (dual socket)Great read though, thanks! Can finally replace my dual socket shanghai opteron home server soon :)
Chaser - Sunday, July 16, 2017 - link
AMD's CPU future is looking very promising!bongey - Tuesday, July 18, 2017 - link
EPYC power consumption is just wrong. Somehow you are 50W over what everyone else is getting at idle. https://www.servethehome.com/amd-epyc-7601-dual-so...Nenad - Thursday, July 20, 2017 - link
Interesting SPECint2006 results:- Intel in their slide #9 claims that Intel 8160 is 2% faster than EPYC 7601
- Anandtech in article tests that EPYC 7601 is 42% faster than Intel 8176
Those two are quite different, even if we ignore that 8176 should be faster than 8160. In other words, those Intel test results look very suspicious.