Memory Subsystem: Bandwidth

Measuring the full bandwidth potential with John McCalpin's Stream bandwidth benchmark is getting increasingly difficult on the latest CPUs, as core and memory channel counts have continued to grow.  We compiled the stream 5.10 source code with the Intel compiler (icc) for linux version 17, or GCC 5.4, both 64-bit. The following compiler switches were used on icc:

icc -fast  -qopenmp  -parallel (-AVX) -DSTREAM_ARRAY_SIZE=800000000 

Notice that we had to increase the array significantly, to a data size of around 6 GB. We compiled one version with AVX and one without. 

The results are expressed in gigabytes per second.

Meanwhile the following compiler switches were used on gcc:

-Ofast -fopenmp -static -DSTREAM_ARRAY_SIZE=800000000

Notice that the DDR4 DRAM in the EPYC system ran at 2400 GT/s (8 channels), while the Intel system ran its DRAM at 2666 GT/s (6 channels). So the dual socket AMD system should theoretically get 307 GB per second (2.4 GT/s* 8 bytes per channel x 8 channels x 2 sockets). The Intel system has access to 256 GB per second (2.66 GT/s* 8 bytes per channel x 6 channels x 2 sockets).

Stream Triad (6 GB)

AMD told me they do not fully trust the results from the binaries compiled with ICC (and who can blame them?). Their own fully customized stream binary achieved 250 GB/s. Intel claims 199 GB/s for an AVX-512 optimized binary (Xeon E5-2699 v4: 128 GB/s with DDR-2400). Those kind of bandwidth numbers are only available to specially tuned AVX HPC binaries. 

Our numbers are much more realistic, and show that given enough threads, the 8 channels of DDR4 give the AMD EPYC server a 25% to 45% bandwidth advantage. This is less relevant in most server applications, but a nice bonus in many sparse matrix HPC applications. 

Maximum bandwidth is one thing, but that bandwidth must be available as soon as possible. To better understand the memory subsystem, we pinned the stream threads to different cores with numactl. 

Pinned Memory Bandwidth (in MB/sec)
Mem
Hierarchy
AMD "Naples"
EPYC 7601
DDR4-2400
Intel "Skylake-SP"
Xeon 8176
DDR4-2666
Intel "Broadwell-EP"
Xeon E5-2699v4
DDR4-2400
1 Thread 27490 12224 18555
2 Threads, same core
same socket
27663 14313 19043
2 Threads, different cores
same socket
29836 24462 37279
2 Threads, different socket 54997 24387 37333
4 threads on the first 4 cores
same socket
29201 47986 53983
8 threads on the first 8 cores
same socket
32703 77884 61450
8 threads on different dies 
(core 0,4,8,12...)
same socket
98747 77880 61504

The new Skylake-SP offers mediocre bandwidth to a single thread: only 12 GB/s is available despite the use of fast DDR-4 2666. The Broadwell-EP delivers 50% more bandwidth with slower DDR4-2400. It is clear that Skylake-SP needs more threads to get the most of its available memory bandwidth.

Meanwhile a single thread on a Naples core can get 27,5 GB/s if necessary. This is very promissing, as this means that a single-threaded phase in an HPC application will get abundant bandwidth and run as fast as possible. But the total bandwidth that one whole quad core CCX can command is only 30 GB/s.

Overall, memory bandwidth on Intel's Skylake-SP Xeon behaves more linearly than on AMD's EPYC. All off the Xeon's cores have access to all the memory channels, so bandwidth more directly increases with the number of threads. 

Testing Notes & Benchmark Configuration Memory Subsystem: Latency
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  • Shankar1962 - Thursday, July 13, 2017 - link

    So you think Intel won't release anything new again by then? Intel would be ready for cascadelake by then. None of the big players won't switch to AMD. Skylake alone is enough to beat epyc handsomely and cascadelake will just blow epyc. Its funny people are looking at lab results when real workloads are showing 1.5-1.7x speed improvement
  • PixyMisa - Saturday, July 15, 2017 - link

    This IS comparing AMD to Intel's newest CPUs, you idiot. Skylake loses to Epyc outright on many workloads, and is destroyed by Epyc on TCO.
  • Shankar1962 - Sunday, July 16, 2017 - link

    Mind your language asshole
    Either continue the debate or find another place for your shit and ur language
    Real workloads don't happen in the labs you moron
    Real workloads are specific to each company and Intel is ahead either way
    If you have the guts come out with Q3 Q4 2017 and 2018 revenues from AMD
    If you come back debating epyc won over skylake if AMD gets 5-10% share then i pity your common sense and your analysis
    You are a bigger idiot because you spoiled a healthy thread where people were taking sides by presenting technical perspective
  • PixyMisa - Tuesday, July 25, 2017 - link

    I'm sorry you're an idiot.
  • Shankar1962 - Thursday, July 13, 2017 - link

    Does not matter. We can debate this forever but Intel is just ahead and better optimized for real world workloads. Nvidia i agree is a potential threat and ahead in AI workloads which is the future but AMD is just an unnecessary hype. Since the fan boys are so excited with lab results (funny) lets look at Q3,Q4 results to see how many are ordering to test it for future deployment.
  • martinpw - Wednesday, July 12, 2017 - link

    I'm curious about the clock speed reduction with AVX-512. If code makes use of these instructions and gets a speedup, will all other code slow down due to lower overall clock speeds? In other words, how much AVX-512 do you have to use before things start clocking down? It feels like it might be a risk that AVX-512 may actually be counterproductive if not used heavily.
  • msroadkill612 - Wednesday, July 12, 2017 - link

    (sorry if a repost)

    Well yeah, but this is where it starts getting weird - 4-6 vega gpuS, hbm2 ram & huge raid nvme , all on the second socket of your 32 core, c/gpu compute ~Epyc server:

    https://marketrealist.imgix.net/uploads/2017/07/A1...

    from

    http://marketrealist.com/2017/07/how-amd-plans-to-...

    All these fabric linked processors, can interact independently of the system bus. Most data seems to get point to point in 2 hops, at about 40GBps bi-directional (~40 pcie3 lanes, which would need many hops), and can be combined to 160GBps - as i recall.

    Suitably custom hot rodded for fabric rather than pcie3, the nvme quad arrays could reach 16MBps sequential imo on epycs/vegaS native nvme ports.

    To the extent that gpuS are increasing their role in big servers, intel and nvidea simply have no answer to amd in the bulk of this market segment.
  • davide445 - Wednesday, July 12, 2017 - link

    Finally real competition in the HPC market. Waiting for the next top500 AMD powered supercomputer.
  • Shankar1962 - Wednesday, July 12, 2017 - link

    Intel makes $60billion a year and its official that Skylake was shipping from Feb17 so i do not understand this excitement from AMD fan boys......if it is so good can we discuss the quarterly revenues between these companies? Why is AMD selling for very low prices when you claim superior performance over Intel? You can charge less but almost 40-50% cheap compared to Intel really?
    AMD exists because they are always inferior and can beat Intel only by selling for low prices and that too for what gaining 5-10% market which is just a matter of time before Intel releases more SKUs to grab it back
    What about the software optimizations and extra BOM if someone switches to AMD?
    What if AMD goes into hibernation like they did in last 5-6years?
    Can you mention one innovation from AMD that changed the world?
    Intel is a leader and all the technology we enjoy today happenned because of Intel technology.
    Intel is a data center giant have head start have the resources money acquisitions like altera mobileeye movidus infineon nirvana etc and its just impossible that they will lose
    Even if all the competent combines Intel will maintain atleast 80% share even 10years from now
  • Shankar1962 - Wednesday, July 12, 2017 - link

    To add on
    No one cares about these lab tests. Let's talk about the real world work loads.
    Look at what Google AWS ATT etc has to say as they already switched to xeon sky lake
    We should not really be debating if we have the clarity that we are talking about AMD getting just 5% -10% share by selling high end products they have for cheap prices....they fo not make too much money by doing that.....they have no other option as thats the only way they can dream of a 5-10% market share
    For Analogy think Intel in semiconductor as Apple in selling smartphones
    Intel has gross margins of ~63%
    They have a solid product portfolio technologies and roadmap .....we can debate this forever but the revenues profits innovations and history between these companies can answer everything

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