Micron has made a number of announcements in recent weeks regarding its GDDR memory for graphics cards, game consoles and networking applications. The company is reporting that they've been able to hit 16 Gbps data rates in the lab on their latest generation of GDDR5X devices, while also reiterating their long-term plans for GDDR6 and GDDR5, with GDDR6 memory due in a couple of quarters from now, while GDDR5 will be here to stay for a long time to come.

Graphics DRAM has been a hot topic in the industry in the recent years as GPU demands for memory bandwidth are growing rapidly and because different companies offer different types of memory to satisfy these increasing requirements. For example, SK Hynix and Samsung rolled out HBM (Gen 1 and Gen 2) memory in 2015 and 2016 for ultra-high-end consumer and HPC applications, whereas Micron introduced its GDDR5X for high-end graphics cards last year. At present, HBM offers the greatest potential bandwidth, however the complexity of the multi-layer chips and 2.5D packaging keep costs high, so it remains to be seen which mass consumer applications adopt it. Meanwhile, conventional graphics memory in BGA packaging and proven architecture continues to evolve and hit new performance targets due to architectural improvements, which are intended to keep it competitive in the coming years.

When Micron announced its GDDR5X memory in late 2015, it set two targets for data transfer rates: the initial target of 10 – 12 Gbps and the longer-term target of 16 Gbps. Initially, the company only supplied GDDR5X ICs validated at 10 and 11 Gbps, but this year the company also started to bin the chips for 12 Gbps. The latter are used on NVIDIA’s Titan Xp graphics card. What is noteworthy is that engineers from Micron's development center in Munich (also known as Graphics DRAM Design Center) recently managed to run the company’s mass-produced GDDR5X chips at 16 Gbps in the lab.

While the achievement doesn't have an impact on actual products available today, it has a number of important implications. Primarily, it means that Micron has refined their process to the point where they can build graphics DRAM with 16 Gbps signaling, and this is something it is going to need going forward. But additionally, it shows that the current GDDR5X technology has potential, and that Micron’s customers might release new products with faster memory.

Micron has been quite busy in the last couple of years working on the GDDR5X memory specification, physical implementation of such ICs, and then developing GDDR6 chips that the company plans to launch by early 2018. In fact, GDDR5X and the GDDR6 are not that different. They are both based on the 16n prefetch architecture and this is the key to their additional performance when compared to GDDR5. Meanwhile, GDDR6 also features dual-channel mode, which is meant to ensure better channel utilization and hence improve performance in cases that can take advantage of the feature.

Micron's GDDR Memory at Glance
Capacity 4 Gb - 8 Gb 8 Gb 8 Gb
Data Rate 5 - 8 Gbps 10 - 12 Gbps Over 12 Gbps
Process Technology 20+ nm
20 nm, 16 nm
20 nm 16 nm

Meanwhile Micron will be using 16 nm fab lines to produce GDDR6 memory devices, which may add frequency potential to the upcoming chips compared to ICs made using their 20 nm fabrication process. Speaking of 16 nm, Micron also plans to use it for newer GDDR5 chips, which makes a lot of sense considering the fact that such devices are going to be used for graphics cards and game consoles for years to come.

Summing up. Micron has GDDR5X memory chips that run at 16 Gbps in the lab using test equipment. Such chips are made using 20 nm process technology. Meanwhile Micron is using 16 nm fabrication process to produce GDDR6 and GDDR5 by 2018.

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Source: Micron

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  • edzieba - Monday, June 19, 2017 - link

    To compare a potential 16Gb/s (per pin) GDDR5x or GDDR6 to HBM2:

    HBM2 2-die bandwidth: 512GB/s (Vega seems to be using a cut-down bus for some reason, with the published 480GB/s speeds)
    To match this with 16GB/s GDDR5X you would need a 256bit bus. Many GPUs already exceed this, so matching two-stack HBM2 bandwidth with discrete GDDR is not a difficult task.

    For 4-stack HBM2, you'd need a 512GB GDDR bus. IIRC the last GPU to have a bus that wide was the GTX285 with a GDDR3 bus. A 384bit wide bus is not out of the question and is used in current chips, so that gives 696GB/s vs. 4-stach HBM2's 1024GB/s.

    The point for consumer GPUs is rather moot though, raw memory throughput does not seem to be a limiting factor in any current engine.
  • Santoval - Monday, June 19, 2017 - link

    "For 4-stack HBM2, you'd need a 512GB GDDR bus"
    Presumably you meant "512 bit bus".
  • patrickjp93 - Monday, June 19, 2017 - link

    R9 390X, but thanks for playing.
  • ImSpartacus - Monday, June 19, 2017 - link

    Vega isn't using a cut down bus.

    2 Gbps HBM2 is not available. The per pin speed is lower, not the bus.
  • StevoLincolnite - Monday, June 19, 2017 - link

    I miss the days when they used Mhz as the denominator for DRAM.
  • FreckledTrout - Monday, June 19, 2017 - link

    The mining crowd would disagree on memory throughput not being a limiting factor. For gaming I agree, at least until a game engine actually uses 4k res textures.
  • MrSpadge - Monday, June 19, 2017 - link

    Well, the mining crowd could avoid that memory bottleneck completely (btw it's more about latency than bandwidth for Ethereum) if they wouldn't insist on creating other algorithms (than what Bitcoin uses), just so they can not be efficiently run on ASICs. They're deliberately burning energy, so to say.
  • baka_toroi - Tuesday, June 20, 2017 - link

    Do you fail to see why an ASIC focused cryptocurrency is a bad thing?
  • DanNeely - Tuesday, June 20, 2017 - link

    It doesn't matter what the preferred miner for a specific coin is, the end result is always that the red queens race is run with ever more participants until:

    amortized_cost_of_miners + power_cost = value_of_coins_mined.
  • Zizy - Monday, June 19, 2017 - link

    390X was the last with 512b bus. It was not that long ago, and not that impossible to happen again.

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