ARM moves at an aggressive pace, pushing out new processor IP on a yearly cadence. It needs to move fast partly because it has so many partners across so many industries to keep happy and partly because it needs to keep up with the technology its IP comes into contact with, everything from new process nodes to higher quality displays to artificial intelligence. To keep pace, ARM keeps multiple design teams in several different locations all working in parallel.

At its annual TechDay event last year, held at one such facility in Austin, Texas, ARM introduced the Mali-G71 GPU—the first to use its new Bifrost GPU architecture—and the Cortex-A73 CPU—a new big core to replace the A72 in mobile. Notably absent, however, was a new little core.

Another year, another TechDay, and another ARM facility (this time in Cambridge, UK)—can only mean new ARM IP. Over the span of several days, we got an in-depth look at its latest technologies, including DynamIQ, the Mali-G72 GPU, the Cortex-A75, and (yes, finally) the successor to the A53: Cortex-A55.

The A53 was announced alongside the A57 and has been in use for several years, both on its own or as the little core in a big.LITTLE configuration. It’s been hugely successful, with more than 40 licensees and 1.7 billion units shipped in just 3 years. But during this time ARM introduced new big cores on a yearly cadence, moving from A57 to A72 to A73. The A53 remained unchanged, however, even as the performance gap between the big and little cores continued to grow.

Predictably then, the focus for A55 was on improving performance. The A53’s dual-issue, in-order core, which serves as the starting point for A55, already delivers good throughput, so ARM focused on improving the memory system. A new data prefetcher, an integrated L2 cache that reduces latency by 50%, and an extra level of L3 cache (among other changes) give the A55 significantly better memory performance—quantified by a nearly 2x improvement in the LMBench memory copy test. The numbers provided by ARM also show an 18% performance gain in SPECint 2006 and an even bigger 38% gain in SPECfp 2006 relative to the A53. These numbers, as well as the others shown in the chart, comparing the A55 and A53 are at the same frequency, same L1/L2 cache sizes, same compiler, etc. and are meant to be a fair comparison. The actual gains should actually be a little higher, because partner SoCs will benefit from adding the L3 cache, which these numbers do not include.

The additional performance does not come for free, however. Power consumption is up 3% relative to the A53 (iso-process, iso-frequency), but power efficiency still improves by 15% when running SPECint 2000 because of its higher performance.

The A55 includes several new features too that will help it expand into new markets. Virtual Host Extensions (VHE) are very important for the automotive market and the advanced safety and reliability features, including architectural RAS support and ECC/parity for all levels of cache are critical for many applications, including automotive and industrial. There’s new features for infrastructure applications too, including a new Int8 dot product instruction (useful for accelerating neural networks). Because A55 is compatible with DynamIQ, it also gets cache stashing and access to a 256-bit AMBA 5 CHI port.

When ARM announced the A73 last year, it talked a lot about improving sustained performance and working within a tight thermal envelope. In other words, the A73 was all about improving power efficiency. The A75 goes in a different direction: Taking advantage of the A73’s thermal headroom, ARM focused on improving performance while maintaining the same efficiency as the A73.

Our previous performance testing revealed mixed results when comparing the A73 to the A72—not too surprising given the significant differences in microarchitecture—with the A73 generally outpacing the A72 by a small margin for integer tasks but falling behind the older CPU in floating point workloads. Things look better for the A75, at least based on ARM’s numbers, which show noticeable gains over the A73 in both integer and floating-point workloads as well as memory streaming.

The graph above shows that the A75 operating at 3GHz on a 10nm node achieves better performance and the same efficiency as an A73 operating at 2.8GHz on a 10nm node, which means the A75 consumes more power. How much more is difficult to tell based on this one simple graph. We know that the A73 is thermally limited when using 4 cores (albeit less so than the A72), so the A75 definitely will be as well. This is not a common scenario, however. Most mobile workloads only fire up 1-2 cores at a time and usually only in short bursts. ARM obviously felt comfortable enough using the A73’s extra thermal headroom to boost performance without negatively impacting sustained performance.

ARM wants to push the A75 into larger form-factor devices with power budgets beyond mobile’s 750mW/core too by pushing frequency higher. Something like a Chromebook or a 2-in-1 ultraportable come to mind. At 1W/core the A75 delivers 25% higher performance than the A73 and at 2W/core the A75’s advantage bumps up to 30% when running SPECint 2006. If anything, these numbers highlight why it’s not a good idea to push performance with frequency alone, as dynamic power scales exponentially.

ARM targeted the A73 specifically at mobile by focusing on power efficiency and removing some features useful for other applications to simplify the design, including no ECC on the L1 cache and no option for a 256-bit AMBA 5 CHI port. With A75, there’s now a clear upgrade path from A72. For the server and infrastructure markets, A75 supports ECC/parity for all levels of cache and AMBA 5 CHI for connecting to larger CCI, CCN, or CMN fabrics, and for automotive and other safety critical applications there’s architectural RAS support, protection against data poisoning, and improved error management.

On the next few pages, we’ll dive deeper into the technical details and features of ARM’s new IP, including DynamIQ (the next iteration of big.LITTLE), Cortex-A75, and Cortex-A55.

DynamIQ
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  • melgross - Wednesday, May 31, 2017 - link

    No, we don't know if they're fake. TSMC stated, months ago, that they were delivering 10nm parts to their largest customers, which one would presume, is Apple.

    And my statement stand. If the best the u35 can do is just over 2,000, then these parts are slightly over twice as fast. And if the claim for the multiprocessing score is right, then that's well over the score for any 4 core ARM chip from anyone else.

    ''Traditionally", these scores that leak out, whether real, or not, are remarkably close to what's tested after Apple's product does come out, often being somewhat lower that the "real" scores.
    Reply
  • jjj - Monday, May 29, 2017 - link

    Apple's ST perf is marketing for folks like you, nothing more.
    ST perf is too high for mobile even with A75 and ST perf is not what matters. We would all be better off with less ST and higher efficiency.
    Sadly people like you are pushing the industry into pushing ST for no reason.
    Apple 's core is huge compared to ARM's core and for what, ST perf you don't need ,lower MT and efficiency.
    Reply
  • aryonoco - Monday, May 29, 2017 - link

    I'm curious to know what you are basing this on.

    From where I stand, the great majority of times on mobiles are spent either on the web, or in games. Javascript is still very much single-threaded, so higher ST performance directly results in better web experience.

    Why do you think that "I don't need ST perf"?

    Note: I don't have a single iOS device, though I'd have loved to have an Android device with A10 inside.
    Reply
  • melgross - Wednesday, May 31, 2017 - link

    Nonsense! If this were a Qualcomm or Samsung chip, you wouldn't be saying that, and we both know that. While I don't know what other chips use, Apple's is about 3 watts, which is likely about what the others are. But Apple manages to get far better performance. That's never a bad thing.

    I don't think you understand what smartphones are being used for.
    Reply
  • melgross - Monday, May 29, 2017 - link

    While we don't know if the benchmarks that have been listed for the new A11 from Apple are real, though they seem to be what we would expect, individual cores are hitting over 4,500 and slightly under 9,000 multicore, with both cores.

    With everything I've read here, I'm still not sure what we would expect from these parts. The highest performing ARM used on Android seems to be well below 2,000 per core, with almost 7,000 for 4 core multicore.

    So, what's to expect here? And how much of this advantage is coming from the process shrink, rather than from core improvements?
    Reply
  • tipoo - Monday, May 29, 2017 - link

    Yeah that's what I'm wondering, how much is IPC improvement and how much is just clocking it higher on a new node. Reply
  • Wardrive86 - Monday, May 29, 2017 - link

    Shouldn't that be 2-128 bit NEON/FPU pipelines for the A75? If not that's a Max 4 flops per clock and lower than the cores it is replacing Reply
  • serendip - Monday, May 29, 2017 - link

    I hope chip vendors don't push 8x A55 designs for the midrange because they're only good for the low end. Having so many similar cores is pointless because Android rarely uses all 8 cores.

    I'd rather see more 2+4 or 4+4 designs with the A55 and A75, especially something like the old Snapdragon 650/652 with the latest cores and processes. I'm looking to upgrade my Mi Max a year from now and the relevant chips should appear by then. On the other hand, with constant driver updates, this phone could last for a few years still.
    Reply
  • Wilco1 - Tuesday, May 30, 2017 - link

    A Cortex-A55 at 2.5GHz (same as Helio P25) would get close to ST performance of Galaxy S6 (and match MT perf). That was top-end 2 years ago... So while I agree 1+7 or 2+6 would be much better than 8x A55, I don't think you could call an S6 a low-end phone even in 2018! Reply
  • serendip - Tuesday, May 30, 2017 - link

    The Helios with their decacore design couldn't beat the real world speed and battery life of a Snapdragon 65x. It's foolish to run an A55 at 2.5 GHz when an A75 at lower speed uses similar amounts of power while being much faster. At one point, you move the load from the donkey and put it on a race horse :) Reply

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